SN74AHC1G125_08 Datasheet, PDF (1/13 Pages) Texas Instruments – SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

D Operating Range of 2 V to 5.5 V
D Max t_pd of 6 ns at 5 V
DBV PACKAGE
(TOP VIEW)
OE
1
5
V_CC
A
2
SN74AHC1G125
SINGLE BUS BUFFER GATE
WITH 3ĆSTATE OUTPUT
SCLS377J − AUGUST 1997 − REVISED JUNE 2005
D Low Power Consumption, 10-µA Max I_CC
D ±8-mA Output Drive at 5 V
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
OE
1
A
2
GND 3
5
V_CC
OE 1
A2
5 V_CC
4Y
GND 3 4 Y
GND
3
4
Y
See mechanical drawings for dimensions.
description/ordering information
The SN74AHC1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the
output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
SOT (SOT-23) − DBV
Reel of 3000
Reel of 250
SN74AHC1G125DBVR
SN74AHC1G125DBVT
A25_
−40°C to 85°C
SOT (SC-70) − DCK
Reel of 3000
Reel of 250
SN74AHC1G125DCKR
SN74AHC1G125DCKT
AM_
SOT (SOT-553) − DRL Reel of 4000
SN74AHC1G125DRLR AM_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are}
available at www.ti.com/sc/package.
‡ _{The actual top-side marking has one additional character that designates the assembly/test site.}
FUNCTION TABLE
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1
OE
2
A
4
Y
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2005, Texas Instruments Incorporated
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