SN74AHC138 Datasheet, PDF (1/21 Pages) Texas Instruments – 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L – DECEMBER 1995 – REVISED JULY 2003
D Operating Range 2-V to 5.5-V V_CC
D Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
D Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC138 . . . J OR W PACKAGE
SN74AHC138 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
SN74AHC138 . . . RGY PACKAGE
(TOP VIEW)
SN54AHC138 . . . FK PACKAGE
(TOP VIEW)
A1
B2
C3
G2A 4
G2B 5
G1 ⁶
Y7 ⁷
GND ⁸
16 V_CC
15 Y0
14 Y1
13 Y2
12 Y3
11 _Y4
10 _Y5
9 _Y6
1
B2
C3
G2A 4
G2B 5
G1 6
Y7 7
8
16
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9
3 2 1 20 19
C4
18 Y1
G2A 5
17 Y2
NC 6
16 NC
G2B 7
15 Y3
G1 ⁸
14 _Y4
9 10 11 12 13
description/ordering information
NC – No internal connection
The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing
applications that require very short propagation-delay times. In high-performance memory systems, these
decoders can be used to minimize the effects of system decoding. When employed with high-speed memories
utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are
less than the typical access time of the memory. This means that the effective system delay introduced by the
decoders is negligible.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN – RGY
Tape and reel SN74AHC138RGYR
HA138
PDIP – N
Tube
SN74AHC138N
SN74AHC138N
SOIC – D
Tube
Tape and reel
SN74AHC138D
SN74AHC138DR
AHC138
–40°C to 85°C
SOP – NS
Tape and reel SN74AHC138NSR
AHC138
SSOP – DB
Tape and reel SN74AHC138DBR
HA138
TSSOP – PW
Tube
Tape and reel
SN74AHC138PW
SN74AHC138PWR
HA138
TVSOP – DGV
Tape and reel SN74AHC138DGVR
HA138
CDIP – J
Tube
SNJ54AHC138J
SNJ54AHC138J
–55°C to 125°C CFP – W
Tube
SNJ54AHC138W
SNJ54AHC138W
LCCC – FK
Tube
SNJ54AHC138FK
SNJ54AHC138FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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