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SN65LVDS324 Datasheet, PDF (1/24 Pages) Texas Instruments – 1080p60 IMAGE SENSOR RECEIVER
SN65LVDS324
www.ti.com
SLLSED9 – NOVEMBER 2012
1080p60 IMAGE SENSOR RECEIVER
Check for Samples: SN65LVDS324
FEATURES
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•23 Bridges the Interface Between Video Image
Sensors and Processors
• Receives Aptina HiSPi™, Panasonic LVDS, or
Sony LVDS Parallel; Outputs 1.8V CMOS with
10/12/14/16 Bits at 18.5MHz to 162MHz
• SubLVDS Inputs Support Up To 648Mbps
• Integrated 100Ω Differential Input Termination
• Test Image Generation Feature
• Compatible with TI OMAP™ and DaVinci™
Including DM385, DM8127, DM36x, and DMVA
• Low Power 1.8V CMOS Process
• Configurable Output Conventions
• Packaged in 4.5 x 7mm BGA
APPLICATIONS
• IP Network Cameras
• Machine Vision
• Video Conferencing
• Gesture Recognition
DESCRIPTION
The SN65LVDS324 is a SubLVDS deserializer that recovers words, detects sync codes, multiplies the input DDR
clock by a ratio, and outputs parallel CMOS 1.8V data on the rising clock edge. It bridges the video stream
interface between HD image sensors made by leading manufacturers, to a format that common processors can
accept. The supported pixel frequency is 18.5MHz to 162MHz — suitable for resolutions from VGA to 1080p60.
Four high-level modes are supported: Aptina 1-Channel 4-Lane, Aptina 1-Channel 2-Lane, Panasonic 2-Channel
2-Port, and Sony LVDS Parallel. Each supports 10/12/14/16 bit sub-modes, according to Table 1. Each mode
also has a configurable allowable frequency range, as specified by Table 3 register PLL_CFG.
The SN65LVDS324 is configured through its I2C-programmable registers. This volatile memory must be written
after power up. Configuration options include the MSB/LSB output order, sync polarity convention, data slew
rate, and two output timing modes (long-setup or clock-centered), for wider compatibility with different processors
and software. The TESTMODE_VIDEO feature is designed to assist engineering development. The max
allowable frame size is 8191 x 8191.
With integrated differential input termination, and a footprint of 4.5 x 7mm, the SN65LVDS324 provides a
differentiated solution with optimized form, function, and cost. It operates through an ambient temperature range
of –40°C to 85°C.
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Figure 1. General System Diagram
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OMAP, DaVinci are trademarks of Texas Instruments.
2
HiSPi is a trademark of Aptina.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated