SN65LVDS179_07 Datasheet, PDF (1/27 Pages) Texas Instruments – HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS

SN65LVDS179, SN65LVDS180
SN65LVDS050, SN65LVDS051
www.ti.com
SLLS301O – APRIL 1998 – REVISED MAY 2007
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
FEATURES
• Meets or Exceeds the Requirements of ANSI
TIA/EIA-644-1995 Standard
• Full-Duplex Signaling Rates up to 100 Mbps
(See Table 1)
• Bus-Terminal ESD Exceeds 12 kV
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With
Typical Output Voltages of 350 mV and a
100-Ω Load
• Propagation Delay Times
– Driver: 1.7 ns Typ
– Receiver: 3.7 ns Typ
• Power Dissipation at 200 MHz
– Driver: 25 mW Typical
– Receiver: 60 mW Typical
• LVTTL Input Levels Are 5-V Tolerant
• Receiver Maintains High Input Impedance
With V_CC < 1.5 V
• Receiver Has Open-Circuit Fail Safe
DESCRIPTION
The
SN65LVDS179,
SN65LVDS180,
SN65LVDS050, and SN65LVDS051 are differential
line drivers and receivers that use low-voltage
differential signaling (LVDS) to achieve signaling
rates as high as 400 Mbps (see the Application
Information section). The TIA/EIA-644 standard
compliant electrical interface provides a minimum
differential output voltage magnitude of 247 mV into
a 100-Ω load and receipt of 50-mV signals with up to
1 V of ground potential difference between a
transmitter and receiver.
The intended application of this device and signaling
technique is for point-to-point baseband data
transmission over controlled impedance media of
approximately 100-Ω characteristic impedance. The
transmission media may be printed-circuit board
traces, backplanes, or cables. (Note: The ultimate
rate and distance of data transfer depends on the
attenuation characteristics of the media, the noise
coupling to the environment, and other application
specific characteristics).
SN65LVDS179D (Marked as DL179 or LVD179)
SN65LVDS179DGK (Marked as S79)
(TOP VIEW)
V_CC 1
R2
D3
GND 4
8A
7B
6Z
5Y
3
D
2
R
SN65LVDS180D (Marked as LVDS180)
SN65LVDS180PW (Marked as LVDS180)
(TOP VIEW)
NC ₁
R2
RE 3
DE 4
D5
GND 6
GND 7
14 ^VCC
13 VCC
12 A
11 B
10 Z
9Y
8 NC
5
D
4
DE ₃
RE
2
R
SN65LVDS050D (Marked as LVDS050)
SN65LVDS050PW (Marked
(TOP VIEW)
as
LVDS050)
1D
15
1B 1
1A 2
1R 3
16 V_CC
15 1D
14 1Y
12
DE
9
2D
RE 4
2R 5
13 1Z
12 DE
3
1R
2A 6
2B 7
GND 8
11 2Z
10 2Y
9 2D
4
RE
5
2R
SN65LVDS051D (Marked as LVDS051)
SN65LVDS051PW (Marked as LVDS051)
(TOP VIEW)
15
1D
1B 1
16 V_CC
4
1A 2
1R 3
15 1D
14 1Y
1DE
3
1R
1DE 4 13 1Z
2R 5
2A 6
2B 7
GND 8
12 2DE
11 2Z
10 2Y
9 2D
9
2D
12
2DE
5
2R
5
Y
6
Z
8
A
7
B
9
Y
10
Z
12
A
11
B
14
1Y
13
1Z
10
2Y
11
2Z
2
1A
1
1B
6
2A
7
2B
14
1Y
13
1Z
2
1A
1
1B
10
2Y
11
2Z
6
2A
7
2B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2007, Texas Instruments Incorporated