SN65LVDM179_07 Datasheet, PDF (1/26 Pages) Texas Instruments – HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS

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SN65LVDM179, SN65LVDM180
SN65LVDM050, SN65LVDM051
SLLS324G – DECEMBER 1998 – REVISED APRIL 2007
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
FEATURES
• Low-Voltage Differential 50-Ω Line Drivers and
Receivers
• Typical Signaling Rates of 500 Mbps (see
Table 1)
• Bus-Terminal ESD Exceeds 12 kV
• Operates From a Single 3.3-V Supply
• Low-Voltage Differential Signaling With
Typical Output Voltages of 340 mV With a
50-Ω Load
• Valid Output With as Little as 50-mV Input
Voltage Difference
• Propagation Delay Times
– Driver: 1.7 ns Typical
– Receiver: 3.7 ns Typical
• Power Dissipation at 200 MHz
– Driver: 50 mW Typical
– Receiver: 60 mW Typical
• LVTTL Input Levels Are 5-V Tolerant
• Driver Is High Impedance When Disabled or
With V_CC < 1.5 V
• Receiver Has Open-Circuit Failsafe
DESCRIPTION
The
SN65LVDM179,
SN65LVDM180,
SN65LVDM050, and SN65LVDM051 are differential
line drivers and receivers that use low-voltage
differential signaling (LVDS) to achieve high
signaling rates. These circuits are similar to
TIA/EIA-644 standard compliant devices
(SN65LVDS) counterparts, except that the output
current of the drivers is doubled. This modification
provides a minimum differential output voltage
magnitude of 247 mV across a 50-Ω load simulating
two transmission lines in parallel. This allows having
data buses with more than one driver or with two line
termination resistors. The receivers detect a voltage
difference of 50 mV with up to 1 V of ground
potential difference between a transmitter and
receiver.
The intended application of these devices and
signaling techniques is point-to-point half duplex,
baseband data transmission over a controlled
impedance media of approximately 100 Ω
characteristic impedance.
SN65LVDM179D (Marked as DM179 or LVM179)
SN65LVDM179DGK (Marked as M79)
(TOP VIEW)
V_CC 1
R2
D3
GND 4
8A
7B
6Z
5Y
3
D
2
R
SN65LVDM180D (Marked as LVDM180)
SN65LVDM180PW (Marked as LVDM180)
(TOP VIEW)
NC ₁
R2
RE 3
DE 4
D5
GND 6
GND 7
14 ^VCC
13 VCC
12 A
11 B
10 Z
9Y
8 NC
5
D
4
DE ₃
RE
2
R
SN65LVDM050D (Marked as LVDM050)
SN65LVDM050PW (Marked as LVDM050)
(TOP VIEW)
1B 1
1A 2
1R 3
RE 4
16 V_CC
15 1D
14 1Y
13 1Z
15
1D
12
DE
9
2D
2R 5
2A 6
2B 7
GND 8
12 DE
11 2Z
10 2Y
9 2D
3
1R
4
RE
5
2R
SN65LVDM051D (Marked as LVDM051)
SN65LVDM051PW (Marked as LVDM051)
(TOP VIEW)
15
1B 1
1A 2
16 V_CC
15 1D
1D
4
1DE
1R 3
14 1Y
3
1R
1DE 4
13 1Z
2R 5
2A 6
2B 7
GND 8
12 2DE
11 2Z
10 2Y
9 2D
9
2D
12
2DE
5
2R
5
Y
6
Z
8
A
7
B
9
Y
10
Z
12
A
11
B
14
1Y
13
1Z
10
2Y
11
2Z
2
1A
1
1B
6
2A
7
2B
14
1Y
13
1Z
2
1A
1
1B
10
2Y
11
2Z
6
2A
7
2B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2007, Texas Instruments Incorporated