SN65DSI86 Datasheet, PDF (1/68 Pages) Texas Instruments – Embedded DisplayPort (eDP) 1.4 Compliant Supporting 1, 2, or 4 Lanes at 1.62Gbps (RBR)

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SN65DSI86
SN65DSI96
SLLSEH2 – SEPTEMBER 2013
MIPI® DSI BRIDGE to eDP
Check for Samples: SN65DSI86 , SN65DSI96
FEATURES
1
APPLICATIONS
•234 Embedded DisplayPort (eDP) 1.4 Compliant
Supporting 1, 2, or 4 Lanes at 1.62Gbps (RBR),
2.7Gbps (HBR), or 5.4Gbps (HBR2).
• Implements MIPI^® D-PHY Version 1.1 Physical
Layer Front-End and Display Serial Interface
(DSI) Version 1.02.00
• Tablet PC, Notebook PC, Netbooks
• Mobile Internet Devices
LCD
eDP TCON
• Dual Channel DSI Receiver Configurable for
One, Two, Three, or Four D-PHY Data Lanes
Per Channel Operating up to 1.5Gbps Per Lane
• Supports 18 bpp and 24 bpp DSI Video
Packets with RGB666 and RGB888 Formats
DSI86/96
Dual/Single DSI to
eDP
• Suitable for 60fps 4K 4096x2304 Resolution at
18bpp Color, and WUXGA 1920x1200
Resolution with 3D Graphics at 60fps (120fps
Equivalent)
• MIPI^® Front-End Configurable for Single-
Channel or Dual-Channel DSI Configuration
DSI–enabled
Chipset
• Supports Dual Channel DSI ODD/EVEN and
DESCRIPTION
LEFT/RIGHT Operating Modes
• 1.2V Main VCC Power Supply and 1.8V supply
for Digital I/Os
• Low Power Features Include Panel Refresh
and MIPI® Ultra-Low Power State (ULPS)
Support
• DisplayPort Lane Polarity and assignment
configurable.
• Supports 12MHz, 19.2MHz, 26MHz, 27MHz, and
The SN65DSI86/96 DSI to embedded DisplayPort
(eDP) bridge features a dual-channel MIPI® D-PHY
receiver front-end configuration with 4 lanes per
channel operating at 1.5Gbps per lane; a maximum
input bandwidth of 12Gbps. The bridge decodes
MIPI® DSI 18bpp RGB666 and 24bpp RGB888
packets and converts the formatted video data stream
to a DisplayPort with up to four lanes at either
1.62Gbps, 2.16Gbps, 2.43Gbps, 2.7Gbps, 3.24Gbps,
4.32Gbps, or 5.4Gbps.
38.4MHz REFCLK
• Adaptive content management and backlight
PWM control enabling optimal user viewing
experience in both low and bright ambient
light environments available in SN65DSI96.
• ESD Rating ±4 kV (HBM)
The SN65DSI86/96 is well suited for WQXGA at 60
frames per second, as well as 3D Graphics at 4K and
True HD (1920x1080) resolutions at an equivalent
120fps with up to 24 bits-per-pixel. Partial line
buffering is implemented to accommodate the data
stream mismatch between the DSI and DisplayPort
interfaces.
• Packaged in 64-pin 5x5mm PBGA (ZQE)
• Temperature Range: –40°C to 85°C
Integrated into the SN65DSI96 is an adaptive content
management and backlight PWM control called
Assertive Display^®. The purpose of the Assertive
Display^® core is to optimize the viewing experience
on a multimedia display as a function of viewing
environment. It provides coherent management of the
multimedia viewing experience from total darkness to
bright ambient light conditions enabling the display to
operate at reduced power and in bright sunshine.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Assertive Display is a registered trademark of Apical.
2
MIPI is a registered trademark of Arasan Chip Systems, Inc.
3
MIPI is a registered trademark of MIPI Alliance, Inc.
4
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated