SN55LVDS32_00 Datasheet, PDF (1/22 Pages) Texas Instruments – HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
D Meets or Exceeds the Requirements of
ANSI TIA/EIA-644 Standard
D Operates with a Single 3.3-V Supply
D Designed for Signaling Rate of Up To
400 Mbps
D Differential Input Thresholds ± 100 mV Max
D Typical Propagation Delay Time of 2.1 ns
D Power Dissipation 60 mW Typical per
Receiver at 200 MHz
D Bus-Terminal ESD Protection Exceeds 8 kV
D Low-Voltage TTL (LVTTL) Logic Output
Levels
D Pin-Compatible with the AM26LS32,
MC3486, and µA9637
D Open-Circuit Fail Safe
description
The
SN55LVDS32,
SN65LVDS32,
SN65LVDS3486, and SN65LVDS9637 are
differential line receivers that implement the
electrical characteristics of low-voltage differential
signaling (LVDS). This signaling technique lowers
the output voltage levels of 5-V differential
standard levels (such as EIA/TIA-422B) to reduce
the power, increase the switching speeds, and
allow operation with a 3.3-V supply rail. Any of the
four differential receivers provides a valid logical
output state with a ±100 mV differential input
voltage within the input common-mode voltage
range. The input common-mode voltage range
allows 1 V of ground potential difference between
two LVDS nodes.
The intended application of these devices and
signaling technique is both point-to-point and
multidrop (one driver and multiple receivers) data
transmission over controlled impedance media of
approximately 100 Ω. The transmission media
may be printed-circuit board traces, backplanes,
or cables. The ultimate rate and distance of data
transfer is dependent upon the attenuation
characteristics of the media and the noise
coupling to the environment.
The SN65LVDS32, SN65LVDS3486, and
SN65LVDS9637 are characterized for operation
from – 40°C to 85°C. The SN55LVDS32 is
characterized for operation from – 55°C to 125°C.
SLLS262H – JULY 1997 – REVISED MARCH 2000
SN55LVDS32 . . . J OR W
SN65LVDS32D
(Marked as LVDS32 or 65LVDS32)
(TOP VIEW)
1B 1
1A 2
1Y 3
G4
2Y 5
2A 6
2B 7
GND 8
16 V_CC
15 4B
14 4A
13 4Y
12 G
11 3Y
10 3A
9 3B
SN55LVDS32FK
(TOP VIEW)
3 2 1 20 19
1Y ₄
18 ^4A
G₅
17 ^4Y
NC ₆
16 ^NC
2Y ₇
15 ^G
2A ₈
14 ^3Y
9 10 11 12 13
SN65LVDS3486D (Marked as LVDS3486)
(TOP VIEW)
1B 1
1A 2
1Y 3
1,2EN 4
2Y 5
2A 6
2B 7
GND 8
16 V_CC
15 4B
14 4A
13 4Y
12 3,4EN
11 3Y
10 3A
9 3B
SN65LVDS9637D (Marked as DK637 or LVDS37)
SN65LVDS9637DGN (Marked as L37)
(TOP VIEW)
V_CC 1
1Y 2
2Y 3
GND 4
8 1A
7 1B
6 2A
5 2B
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
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testing of all parameters.
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