SN54LVTH2952 Datasheet, PDF (1/8 Pages) Texas Instruments – 3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

SN54LVTH2952, SN74LVTH2952
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS710D – OCTOBER 1997 – REVISED APRIL 1999
D State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
D I_off and Power-Up 3-State Support Hot
Insertion
D Bus-Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V_CC)
D Support Unregulated Battery Operation
Down to 2.7 V
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
D Latch-Up Performance Exceeds 500 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Thin Very Small-Outline (DGV) Packages,
Ceramic Chip Carriers (FK), and Ceramic
(JT) DIPs
description
SN54LVTH2952 . . . JT PACKAGE
SN74LVTH2952 . . . DB, DGV, DW, OR PW PACKAGE
(TOP VIEW)
B8 1
B7 2
B6 3
B5 4
B4 5
B3 6
B2 7
B1 8
OEAB 9
CLKAB 10
CLKENAB 11
GND 12
24 V_CC
23 A8
22 A7
21 A6
20 A5
19 A4
18 A3
17 A2
16 A1
15 OEBA
14 CLKBA
13 CLKENBA
SN54LVTH2952 . . . FK PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
B5 ⁵
25 _A6
B4 ⁶
24 _A5
B3 ⁷
23 _A4
NC ⁸
22 _NC
B2 ⁹
21 _A3
B1 ¹⁰
20 _A2
OEAB ¹¹
19 _A1
12 13 14 15 16 17 18
These octal bus transceivers and registers are
designed specifically for low-voltage (3.3-V) V_CC
operation, but with the capability to provide a TTL
interface to a 5-V system environment.
NC – No internal connection
The ’LVTH2952 devices consist of two 8-bit back-to-back registers that store data flowing in both directions
between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition
of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB or CLKENBA) input is low.
Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright © 1999, Texas Instruments Incorporated
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