SN54LVTH16245A_08 Datasheet, PDF (1/20 Pages) Texas Instruments – 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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FEATURES
• Members of the Texas Instruments Widebus™
Family
• State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
• Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V_CC)
• Support Unregulated Battery Operation Down
to 2.7 V
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Distributed V_CC and GND Pins Minimize
High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB
Layout
• I_off and Power-Up 3-State Support Hot
Insertion
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 500 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
SN54LVTH16245A, SN74LVTH16245A
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS143R – MAY 1992 – REVISED NOVEMBER 2006
SN54LVTH16245A . . . WD PACKAGE
SN74LVTH16245A . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1DIR ¹
1B1 ²
1B2 ³
GND ⁴
1B3 ⁵
1B4 ⁶
V_CC ⁷
1B5 ⁸
1B6 ⁹
GND ¹⁰
1B7 ¹¹
1B8 ¹²
2B1 ¹³
2B2 ¹⁴
GND ¹⁵
2B3 ¹⁶
2B4 ¹⁷
V_CC ¹⁸
2B5 ¹⁹
2B6 ²⁰
GND ²¹
2B7 ²²
2B8 ²³
2DIR ²⁴
48 _1OE
47 _1A1
46 _1A2
45 _GND
44 _1A3
43 _1A4
42 _VCC
41 _1A5
40 _1A6
39 _GND
38 _1A7
37 _1A8
36 _2A1
35 _2A2
34 _GND
33 _2A3
32 _2A4
31 _VCC
30 _2A5
29 _2A6
28 _GND
27 _2A7
26 _2A8
25 _2OE
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) V_CC operation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices are designed for asynchronous communication between two data buses. The logic levels of the
direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess I_CC and I_CCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
When V_CC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V_CC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1992–2006, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.