SN54LVT8980A Datasheet, PDF (1/35 Pages) Texas Instruments – EMBEDDED TEST-BUS CONTROLLERS IEEE STD 1149.1 (JTAG) TAP MASTER WITH 8-BIT GENERIC HOST INTERFACES

SN54LVT8980A, SN74LVT8980A
EMBEDDED TESTĆBUS CONTROLLERS
IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 8ĆBIT GENERIC HOST INTERFACES
SCBS755B − APRIL 2002 − REVISED MARCH 2004
D Members of Texas Instruments Broad
Family of Testability Products Supporting
IEEE Std 1149.1-1990 (JTAG) Test Access
Port (TAP) and Boundary-Scan Architecture
D Provide Built-In Access to IEEE Std 1149.1
Scan-Accessible Test/Maintenance
Facilities at Board and System Levels
D While Powered at 3.3 V, the TAP Interface Is
Fully 5-V Tolerant for Mastering Both 5-V
and/or 3.3-V IEEE Std 1149.1 Targets
D Simple Interface to Low-Cost 3.3-V
Microprocessors/Microcontrollers Via 8-Bit
Asynchronous Read/Write Data Bus
D Easy Programming Via Scan-Level
Command Set and Smart TAP Control
D Transparently Generate Protocols to
Support Multidrop TAP Configurations
Using TI’s Addressable Scan Port
D Flexible TCK Generator Provides
Programmable Division, Gated-TCK, and
Free-Running-TCK Modes
D Discrete TAP Control Mode Supports
Arbitrary TMS/TDI Sequences for
Noncompliant Targets
D Programmable 32-Bit Test Cycle Counter
Allows Virtually Unlimited Scan/Test Length
D Accommodate Target Retiming (Pipeline)
Delays of up to 15 TCK Cycles
D Test Output Enable (TOE) Allows for
External Control of TAP Signals
D High-Drive Outputs (−32-mA I_OH, 64-mA I_OL)
at TAP Support Backplane Interface and/or
High Fanout
SN54LVT8980A . . . JT PACKAGE
SN74LVT8980A . . . DW PACKAGE
(TOP VIEW)
STRB 1
R/W 2
D0 3
D1 4
D2 5
D3 6
GND 7
D4 8
D5 9
D6 10
D7 11
CLKIN 12
24 _A0
23 _A1
22 _A2
21 _RDY
20 _TDO
19 _VCC
18 _TCK
17 _TMS
16 _TRST
15 _TDI
14 _RST
13 _TOE
SN54LVT8980A . . . FK PACKAGE
(TOP VIEW)
D1
D2
D3
NC
GND
D4
D5
5 ^{4 3 2 1 28 27 2625}
6
24
7
23
8
22
9
21
10
20
11
19
12 13 14 15 16 17 18
RDY
TDO
V_CC
NC
TCK
TMS
TRST
NC − No internal connection
description
The ’LVT8980A embedded test-bus controllers (eTBCs) are members of the TI broad family of testability
integrated circuits. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of
complex circuit assemblies. Unlike most other devices of this family, the eTBCs are not boundary-scannable
devices; rather, their function is to master an IEEE Std 1149.1 (JTAG) test access port (TAP) under the command
of an embedded host microprocessor/microcontroller. Thus, the eTBCs enable the practical and effective use
of the IEEE Std 1149.1 test-access infrastructure to support embedded/built-in test, emulation, and
configuration/maintenance facilities at board and system levels.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2004, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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