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SN54LVCH245A_10 Datasheet, PDF (1/28 Pages) Texas Instruments – OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
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SN54LVCH245A, SN74LVCH245A
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCES008O – JULY 1995 – REVISED DECEMBER 2005
FEATURES
• Operate From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max tpd of 6.3 ns at 3.3 V
• Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
• Support Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V VCC)
• Ioff Supports Partial-Power-Down Mode
Operation
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
SN54LVCH245A . . . J OR W PACKAGE
SN74LVCH245A . . . DB, DGV, DW, NS,
OR PW PACKAGE
(TOP VIEW)
SN74LVCH245A . . . RGY PACKAGE
(TOP VIEW)
SN54LVCH245A . . . FK PACKAGE
(TOP VIEW)
DIR 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
GND 10
20 VCC
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
10
20
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11
3 2 1 20 19
A3 4
18 B1
A4 5
17 B2
A5 6
16 B3
A6 7
15 B4
A7 8
14 B5
9 10 11 12 13
DESCRIPTION/ORDERING INFORMATION
The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V VCC operation, and the
SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V VCC operation.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
These devices are designed for asynchronous communication between data buses. These devices transmit data
from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control
(DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input
circuit and is not disabled by OE or DIR.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.