SN54LVCH244A_07 Datasheet, PDF (1/23 Pages) Texas Instruments – OCTAL BUFFERS/DRIVERS OCTAL BUFFERS/DRIVERS

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SN54LVCH244A, SN74LVCH244A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCES009O – JULY 1995 – REVISED FEBRUARY 2007
FEATURES
• Operate From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 5.9 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
• Support Mixed-Mode Signal Operation on All
Ports
(5-V Input/Output Voltage With 3.3-V V_CC)
• I_off Supports Partial-Power-Down Mode
Operation
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54LVCH244A . . . J OR W PACKAGE
SN74LVCH244A . . . DB, DBQ, DGV, DW,
NS, OR PW PACKAGE
(TOP VIEW)
SN74LVCH244A . . . RGY PACKAGE
(TOP VIEW)
SN54LVCH244A . . . FK PACKAGE
(TOP VIEW)
1OE 1
1A1 2
2Y4 3
1A2 4
2Y3 5
1A3 6
2Y2 7
1A4 8
2Y1 9
GND 10
20 V_CC
19 2OE
18 1Y1
17 2A4
16 1Y2
15 2A3
14 1Y3
13 2A2
12 1Y4
11 2A1
1
1A1 2
2Y4 3
1A2 4
2Y3 5
1A3 6
2Y2 7
1A4 8
2Y1 9
10
20
19 2OE
18 1Y1
17 2A4
16 1Y2
15 2A3
14 1Y3
13 2A2
12 1Y4
11
3 2 1 20 19
1A2 4
18 1Y1
2Y3 5
17 2A4
1A3 6
16 1Y2
2Y2 7
15 2A3
1A4 8
14 1Y3
9 10 11 12 13
DESCRIPTION/ORDERING INFORMATION
The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V V_CC operation, and the
SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V V_CC operation.
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
These devices are fully specified for partial-power-down applications using I_off. The I_off circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2007, Texas Instruments Incorporated