SN54LVC138A Datasheet, PDF (1/9 Pages) Texas Instruments – 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS291I – MARCH 1993 – REVISED OCTOBER 1998
D EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
D Inputs Accept Voltages to 5.5 V
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flat (W) Package, and DIPs (J)
description
The SN54LVC138A 3-line to 8-line decoder/
demultiplexer is designed for 2.7-V to 3.6-V V_CC
operation and the SN74LVC138A 3-line to 8-line
decoder/demultiplexer is designed for 1.65-V to
3.6-V V_CC operation.
SN54LVC138A . . . J OR W PACKAGE
SN74LVC138A . . . D, DB, OR PW PACKAGE
(TOP VIEW)
A1
B2
C3
G2A 4
G2B 5
G1 6
Y7 7
GND 8
16 ^V_CC
15 ^Y0
14 ^Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
SN54LVC138A . . . FK PACKAGE
(TOP VIEW)
C
G2A
NC
G2B
G1
3 2 1 20 19
4
18 ^Y1
5
17 Y2
6
16 NC
7
15 Y3
8
14 Y4
9 10 11 12 13
The ’LVC138A devices are designed for high-
performance memory-decoding or data-routing
NC – No internal connection
applications requiring very short propagation
delay times. In high-performance memory systems, these decoders minimize the effects of system decoding.
When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and
the enable time of the memory are usually less than the typical access time of the memory. This means that
the effective system delay introduced by the decoders is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires
only one inverter. An enable input can be used as a data input for demultiplexing applications.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN54LVC138A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVC138A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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