SN54HC563 Datasheet, PDF (1/7 Pages) Texas Instruments – OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SN54HC563, SN74HC563
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS145B – DECEMBER 1982 – REVISED MAY 1997
D High-Current 3-State Outputs Drive Bus
Lines Directly or up to 15 LSTTL Loads
D Bus-Structured Pinout
D Package Options Include Plastic
Small-Outline (DW) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These 8-bit transparent D-type latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
SN54HC563 . . . J OR W PACKAGE
SN74HC563 . . . DW OR N PACKAGE
(TOP VIEW)
OE ₁
1D ₂
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 ^V_CC
19 ^1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 LE
SN54HC563 . . . FK PACKAGE
(TOP VIEW)
While the latch-enable (LE) input is high, the
Q outputs follow the complements of the data (D)
inputs. When LE is taken low, the outputs are
latched at the inverses of the levels set up at the
D inputs.
A buffered output-enable (OE) input places the
eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In
the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and increased high logic
level provide the capability to drive bus lines
without interface or pullup components.
3D
3 2 1 20 19
4
18
2Q
4D ₅
17 ^3Q
5D 6
16 4Q
6D 7
15 5Q
7D 8
14 6Q
9 10 11 12 13
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54HC563 is characterized for operation over the full military temperature range of – 55°C to 125°C. The
SN74HC563 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each latch)
INPUTS
OE LE
D
OUTPUT
Q
L
H
H
L
L
H
L
H
L
L
X
Q0
H
X
X
Z
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1997, Texas Instruments Incorporated
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