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SN54HC125 Datasheet, PDF (1/6 Pages) Texas Instruments – QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
D High-Current 3-State Outputs Interface
Directly With System Bus or Can Drive up
to 15 LSTTL Loads
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Ceramic Flat (W) Packages,
Ceramic Chip Carriers (FK), and Standard
Plastic (N) and Ceramic (J) 300-mil DIPs
description
These quadruple bus buffer gates feature
independent line drivers with 3-state outputs.
Each output is disabled when the associated
output-enable (OE) input is high.
The SN54HC125 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC125 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
SN54HC125, SN74HC125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS104B – MARCH 1984 – REVISED MAY 1997
SN54HC125 . . . J OR W PACKAGE
SN74HC125 . . . D, DB, OR N PACKAGE
(TOP VIEW)
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
14 VCC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
SN54HC125 . . . FK PACKAGE
(TOP VIEW)
1Y
NC
2OE
NC
2A
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3OE
NC – No internal connection
logic symbol†
1
1OE
EN
2
1A
4
2OE
5
2A
10
3OE
9
3A
13
4OE
12
4A
3
1Y
6
2Y
8
3Y
11
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1997, Texas Instruments Incorporated
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