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SN54HC10 Datasheet, PDF (1/5 Pages) Texas Instruments – TRIPLE 3-INPUT POSITIVE-NAND GATES
SN54HC10, SN74HC10
TRIPLE 3-INPUT POSITIVE-NAND GATES
D Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These devices contain three independent 3-input
NAND gates. They perform the Boolean function
Y = A • B • C or Y = A + B + C in positive logic.
The SN54HC10 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74HC10 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
C
OUTPUT
Y
H
H
H
L
L
X
X
H
X
L
X
H
X
X
L
H
SCLS083B – DECEMBER 1982 – REVISED MAY 1997
SN54HC10 . . . J OR W PACKAGE
SN74HC10 . . . D OR N PACKAGE
(TOP VIEW)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 VCC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
SN54HC10 . . . FK PACKAGE
(TOP VIEW)
2A
3 2 1 20 19
4
18
1Y
NC 5
17 NC
2B 6
16 3C
NC 7
15 NC
2C 8
14 3B
9 10 11 12 13
logic symbol†
1
1A
2
1B
13
1C
3
2A
4
2B
5
2C
9
3A
10
3B
11
3C
NC – No internal connection
&
12
1Y
6
2Y
8
3Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
A
B
Y
C
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1997, Texas Instruments Incorporated
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