SN54F573_08 Datasheet, PDF (1/5 Pages) Texas Instruments – OCTAL TRANSPARENT D-TYPE LATCHES WITH S0STATE OUTPUTS

SN54F573, SN74F573
OCTAL TRANSPARENT DĆTYPE LATCHES
WITH 3ĆSTATE OUTPUTS
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993
• Eight Latches in a Single Package
• 3-State Bus-Driving True Outputs
• Full Parallel Access for Loading
• Buffered Control Inputs
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
SN54F573 . . . J PACKAGE
SN74F573 . . . DW OR N PACKAGE
(TOP VIEW)
OE ₁
1D ₂
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 ^V_CC
19 ^1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 LE
SN54F573 . . . FK PACKAGE
(TOP VIEW)
The eight latches of the ′F573 are transparent
D-type latches. While the latch enable (LE) input
is high, the Q outputs follow the data (D) inputs.
When the latch enable is taken low, the Q outputs
are latched at the logic levels set up at the D
inputs.
A buffered output enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
3 2 1 20 19
3D 4
18 2Q
4D 5
17 3Q
5D 6
16 _4Q
6D ⁷
15 _5Q
7D ⁸
14 _6Q
9 10 11 12 13
The output enable (OE) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN54F573 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74F573 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OE LE
D
OUTPUT
Q
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1993, Texas Instruments Incorporated
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• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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