SN54ALVTH32244 Datasheet, PDF (1/11 Pages) Texas Instruments – 2.5-V/3.3-V 32-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

D State-of-the-Art Advanced BiCMOS
Technology (ABT) Widebus ™ Design for
2.5-V and 3.3-V Operation and Low Static
Power Dissipation
D Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 2.3-V to
3.6-V V_CC )
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
D High Drive (–24/24 mA at 2.5-V V_CC and
–32/64 mA at 3.3-V V_CC)
D I_off and Power-Up 3-State Support Hot
Insertion
D Use Bus Hold on Data Inputs in Place of
External Pullup/Pulldown Resistors to
Prevent the Bus From Floating
NOTE: For tape and reel order entry:
The GKER package is abbreviated to KR.
SN54ALVTH32244, SN74ALVTH32244
2.5-V/3.3-V 32-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCES279 – SEPTEMBER 1999
D Auto3-State Eliminates Bus Current
Loading When Output Exceeds V_CC + 0.5 V
D Flow-Through Architecture Facilitates
Printed Circuit Board Layout
D Distributed V_CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D ESD Protection Exceeds JESD-22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D Packaged in Plastic Fine-Pitch Ball Grid
Array Package
description
The ’ALVTH32244 devices are 32-bit buffers/line drivers designed for 2.5-V or 3.3-V V_CC operation, but with
the capability to provide a TTL interface to a 5-V system environment. These devices can be used as eight 4-bit
buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. These devices provide true outputs and
symmetrical active-low output-enable (OE) inputs.
When V_CC is between 0 and 1.2-V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2-V, OE should be tied to V_CC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I_off and power-up 3-state. The I_off circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN54ALVTH32244 is characterized for operation over the full military temperature range of –55°C to
125°C. The SN74ALVTH32244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright © 1999, Texas Instruments Incorporated
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