SN54ALS563A Datasheet, PDF (1/4 Pages) Texas Instruments – OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

SN54ALS563A, SN74ALS563B
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
• 3-State Buffer-Type Outputs Drive Bus-Lines
Directly
• Bus Structured Pinout
• Package Options include Plastic Small Outline
Package, Ceramic Chip Carriers and Standard
Plastic and Ceramic DIPs
• Dependable Texas Instruments Quality and
Reliability
description
These 8-bit latches feature three-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches are transparent D-type latches.
While the enable (C) is high the Q outputs will
follow the complements of data (D) inputs. When
the enable is taken low the output will be latched
at the inverses of the levels that were set up at the
D inputs.
A buffered output-control input can be used to
place the eight outputs in either a normal logic
state (high or low logic levels) or a
high-impedance state. In the high-impedance
state the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased high-logic level provide the capability to
drive the bus lines in a bus-organized system
without need for interface or pull-up components.
The output control (OC) does not affect the
internal operation of the latches. Old data can be
retained or new data can be entered while the
outputs are in the high-impedance state.
The SN54ALS563A is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The SN74ALS563B is characterized for
operation from 0°C to 70°C.
SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989
SN54ALS563A . . . J PACKAGE
SN74ALS563B . . . DW OR N PACKAGE
(TOP VIEW)
OC ₁
1D ₂
2D ₃
3D ₄
4D ₅
5D ₆
6D 7
7D 8
8D 9
GND 10
20 ^V_CC
19 ^1Q
18 ^2Q
17 ^3Q
16 ^4Q
15 ^5Q
14 ^6Q
13 7Q
12 8Q
11 C
SN54ALS563A . . . FK PACKAGE
(TOP VIEW)
3D
3 2 1 20 19
4
18
2Q
4D ₅
17 ^3Q
5D 6
16 4Q
6D 7
15 5Q
7D 8
14 6Q
9 10 11 12 13
FUNCTION TABLE
(each latch)
INPUTS
ENABLE
OC C
D
LH
H
LH
H
LL
X
HX
X
OUTPUT
Q
L
H
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1989, Texas Instruments Incorporated
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