SN54ALS10A Datasheet, PDF (1/6 Pages) Texas Instruments – TRIPLE 3-INPUT POSITIVE-NAND GATES

SN54ALS10A, SN54AS10, SN74ALS10A, SN74AS10
TRIPLE 3-INPUT POSITIVE-NAND GATES
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain three independent 3-input
positive-NAND gates. They perform the Boolean
functions Y = A • B • C or Y = A + B + C in positive
logic.
The SN54ALS10A and SN54AS10 are
characterized for operation over the full military
temperature range of – 55°C to 125°C. The
SN74ALS10A and SN74AS10 are characterized
for operation from 0°C to 70°C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
C
OUTPUT
Y
H
H
H
L
L
X
X
H
X
L
X
H
X
X
L
H
logic symbol^†
1
1A
&
2
1B
13
1C
3
2A
4
2B
5
2C
9
3A
10
3B
11
3C
12
1Y
6
2Y
8
3Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SDAS002B – MARCH 1984 – REVISED DECEMBER 1994
SN54ALS10A, SN54AS10 . . . J PACKAGE
SN74ALS10A, SN74AS10 . . . D OR N PACKAGE
(TOP VIEW)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 1C
12 1Y
11 3C
10 3B
9 3A
8 3Y
SN54ALS10A, SN54AS10 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
2A 4
18 1Y
NC 5
17 NC
2B 6
16 3C
NC 7
15 _NC
2C ⁸
14 _3B
9 10 11 12 13
NC – No internal connection
logic diagram (positive logic)
1
1A
2
1B
1C ¹³
2A ³
2B ⁴
2C ⁵
3A ⁹
3B ¹⁰
11
3C
12
1Y
6
2Y
8 _3Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1994, Texas Instruments Incorporated
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