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SN54AHCT374_07 Datasheet, PDF (1/19 Pages) Texas Instruments – OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AHCT374, SN74AHCT374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS241L – OCTOBER 1995 – REVISED JULY 2003
D Inputs Are TTL-Voltage Compatible
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHCT374 . . . J OR W PACKAGE
SN74AHCT374 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHCT374 . . . FK PACKAGE
(TOP VIEW)
OE 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D 7
4D 8
4Q 9
GND 10
20 VCC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 6D
13 5D
12 5Q
11 CLK
2D
3 2 1 20 19
4
18
8D
2Q 5
17 7D
3Q 6
16 7Q
3D 7
15 6Q
4D 8
14 6D
9 10 11 12 13
description/ordering information
The ’AHCT374 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed
specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable
for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus
lines without interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHCT374N
SN74AHCT374N
SOIC – DW
Tube
Tape and reel
SN74AHCT374DW
SN74AHCT374DWR
AHCT374
–40°C to 85°C
SOP – NS
SSOP – DB
Tape and reel
Tape and reel
SN74AHCT374NSR
SN74AHCT374DBR
AHCT374
HB374
TSSOP – PW
Tube
Tape and reel
SN74AHCT374PW
SN74AHCT374PWR
HB374
TVSOP – DGV Tape and reel SN74AHCT374DGVR HB374
CDIP – J
Tube
SNJ54AHCT374J
SNJ54AHCT374J
–55°C to 125°C CFP – W
Tube
SNJ54AHCT374W
SNJ54AHCT374W
LCCC – FK
Tube
SNJ54AHCT374FK SNJ54AHCT374FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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