SN54AHC574 Datasheet, PDF (1/18 Pages) Texas Instruments – OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SN54AHC574, SN74AHC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS244I – OCTOBER 1995 – REVISED JULY 2003
D Operating Range 2-V to 5.5-V V_CC
D 3-State Outputs Drive Bus Lines Directly
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC574 . . . J OR W PACKAGE
SN74AHC574 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC574 . . . FK PACKAGE
(TOP VIEW)
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 V_CC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 CLK
3D
3 2 1 20 19
4
18
2Q
4D ₅
17 ^3Q
5D 6
16 4Q
6D 7
15 5Q
7D 8
14 6Q
9 10 11 12 13
description/ordering information
The ’AHC574 devices are octal edge-triggered D-type flip-flops that feature 3-state outputs designed
specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly
suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs.
A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low) or the
high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
The high-impedance state and the increased drive provide the capability to drive bus lines without interface or
pullup components.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC574N
SN74AHC574N
SOIC – DW
Tube
Tape and reel
SN74AHC574DW
SN74AHC574DWR
AHC574
–40°C to 85°C
SOP – NS
SSOP – DB
Tape and reel
Tape and reel
SN74AHC574NSR
SN74AHC574DBR
AHC574
HA574
TSSOP – PW
Tube
Tape and reel
SN74AHC574PW
SN74AHC574PWR
HA574
TVSOP – DGV
Tape and reel SN74AHC574DGVR
HA574
CDIP – J
Tube
SNJ54AHC574J
SNJ54AHC574J
–55°C to 125°C CFP – W
Tube
SNJ54AHC574W
SNJ54AHC574W
LCCC – FK
Tube
SNJ54AHC574FK
SNJ54AHC574FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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