SN54AHC373 Datasheet, PDF (1/18 Pages) Texas Instruments – OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

D Operating Range 2-V to 5.5-V V_CC
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
SN54AHC373 . . . J OR W PACKAGE
SN74AHC373 . . . DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC373, SN74AHC373
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS235I – OCTOBER 1995 – REVISED JULY 2003
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC373 . . . FK PACKAGE
(TOP VIEW)
OE 1
1Q 2
1D 3
2D 4
2Q 5
3Q 6
3D ⁷
4D ⁸
4Q ⁹
GND ¹⁰
20 V_CC
19 8Q
18 8D
17 7D
16 7Q
15 6Q
14 _6D
13 _5D
12 _5Q
11 _LE
2D
3 2 1 20 19
4
18
8D
2Q ₅
17 7D
3Q 6
16 7Q
3D 7
15 6Q
4D 8
14 6D
9 10 11 12 13
description/ordering information
The ’AHC373 devices are octal transparent D-type latches designed for 2-V to 5.5-V V_CC operation.
When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs
are latched at the logic levels of the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC373N
SN74AHC373N
SOIC – DW
Tube
Tape and reel
SN74AHC373DW
SN74AHC373DWR
AHC373
–40°C to 85°C
SOP – NS
SSOP – DB
Tape and reel
Tape and reel
SN74AHC373NSR
SN74AHC373DBR
AHC373
HA373
TSSOP – PW
Tube
Tape and reel
SN74AHC373PW
SN74AHC373PWR
HA373
TVSOP – DGV
Tape and reel SN74AHC373DGVR
HA373
CDIP – J
Tube
SNJ54AHC373J
SNJ54AHC373J
–55°C to 125°C CFP – W
Tube
SNJ54AHC373W
SNJ54AHC373W
LCCC – FK
Tube
SNJ54AHC373FK
SNJ54AHC373FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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