SN54AHC125_10 Datasheet, PDF (1/23 Pages) Texas Instruments – QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

SN54AHC125, SN74AHC125
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS256J − DECEMBER 1995 − REVISED JULY 2003
D Operating Range 2-V to 5.5-V V_CC
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
SN54AHC125 . . . J OR W PACKAGE
SN74AHC125 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
SN74AHC125 . . . RGY PACKAGE
(TOP VIEW)
SN54AHC125 . . . FK PACKAGE
(TOP VIEW)
1OE ¹
1A ²
1Y ³
2OE ⁴
2A ⁵
2Y ⁶
GND ⁷
14 V_CC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
7
14
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8
1Y
NC
2OE
NC
2A
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3OE
description/ordering information
NC − No internal connection
The ’AHC125 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs.
Each output is disabled when the associated output-enable (OE) input is high. When OE is low, the respective
gate passes the data from the A input to its Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T_A
PACKAGE^†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY
PDIP − N
Tape and reel
Tube
SN74AHC125RGYR
SN74AHC125N
HA125
SN74AHC125N
−40°C to 85°C
SOIC − D
SOP − NS
SSOP − DB
Tube
Tape and reel
Tape and reel
Tape and reel
SN74AHC125D
SN74AHC125DR
SN74AHC125NSR
SN74AHC125DBR
AHC125
AHC125
HA125
TSSOP − PW
TVSOP − DGV
Tube
Tape and reel
Tape and reel
SN74AHC125PW
SN74AHC125PWR
SN74AHC125DGVR
HA125
HA125
CDIP − J
Tube
SNJ54AHC125J
SNJ54AHC125J
−55°C to 125°C CFP − W
Tube
SNJ54AHC125W
SNJ54AHC125W
LCCC − FK
Tube
SNJ54AHC125FK
SNJ54AHC125FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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