SN54ACT10 Datasheet, PDF (1/5 Pages) Texas Instruments – TRIPLE 3-INPUT POSITIVE-NAND GATES

SN54ACT10, SN74ACT10
TRIPLE 3-INPUT POSITIVE-NAND GATES
D Inputs Are TTL-Voltage Compatible
D EPIC ™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPS
description
SCAS526A – AUGUST 1995 – REVISED APRIL 1996
SN54ACT10 . . . J OR W PACKAGE
SN74ACT10 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 1C
12 1Y
11 3A
10 3B
9 3C
8 3Y
The ’ACT10 contain three independent 3-input
NAND gates. The devices perform the Boolean
functions Y = A • B • C or Y = A + B + C in positive
logic.
The SN54ACT10 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The SN74ACT10 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
C
H
H
H
L
X
X
OUTPUT
Y
L
H
X
L
X
H
X
X
L
H
SN54ACT10 . . . FK PACKAGE
(TOP VIEW)
2A
3 2 1 20 19
4
18
1Y
NC ₅
17 ^NC
2B 6
16 3A
NC 7
15 NC
2C 8
14 3B
9 10 11 12 13
NC – No internal connection
logic symbol^†
logic diagram, each gate (positive logic)
1
1A
&
12
2
1Y
1B
13
1C
3
2A
4
2B
5
2C
6
2Y
11
3A
10
3B
9
3C
8
3Y
† _{This symbol is in accordance with ANSI/IEEE Std 91-1984 and}
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
1A ¹
1B ²
1C ¹³
2A ³
2B ⁴
2C ⁵
3A ¹¹
3B ¹⁰
3C ⁹
12 _1Y
6
2Y
8 _3Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1996, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1