SN54AC573 Datasheet, PDF (1/6 Pages) Texas Instruments – OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

SN54AC573, SN74AC573
OCTAL D-TYPE TRANSPARENT LATCHES
WITH 3-STATE OUTPUTS
SCAS542B - OCTOBER 1995 – REVISED NOVEMBER 1996
D 3-State Outputs Drive Bus Lines Directly
D EPIC ™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
D Package Options Include Plastic
Small-Outline (DW) Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
description
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
SN54AC573 . . . J OR W PACKAGE
SN74AC573 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 V_CC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 LE
SN54AC573 . . . FK PACKAGE
(TOP VIEW)
The eight latches are D-type transparent latches.
When the latch-enable (LE) input is high, the Q
outputs follow the data (D) inputs. When LE is
taken low, the Q outputs are latched at the logic
levels set up at the D Inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the high-imped-
ance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines in a bus-organized system without need for
interface or pullup components.
3 2 1 20 19
3D 4
18 2Q
4D 5
17 3Q
5D 6
16 _4Q
6D ⁷
15 _5Q
7D ⁸
14 _6Q
9 10 11 12 13
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The SN54AC573 is characterized for operation over the full military temperature range of –55_C to 125_C.
The SN74AC573 is characterized for operation from –40_C to 85_C.
FUNCTION TABLE
(each latch)
INPUTS
OE LE
D
OUTPUT
Q
L
H
H
H
L
H
L
L
L
L
X
Q0
H
X
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright © 1996, Texas Instruments Incorporated
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