SN54ABTH32543 Datasheet, PDF (1/9 Pages) Texas Instruments – 36-BIT REGISTERED BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

D Members of the Texas Instruments
Widebus+™ Family
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 5 V, T_A = 25°C
D High-Impedance State During Power Up
and Power Down
D Released as DSCC SMD 5962-9557801NXD
SN54ABTH32543, SN74ABTH32543
36-BIT REGISTERED BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS230F – JUNE 1992 – REVISED MAY 1997
D Distributed V_CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
D High-Drive Outputs (–32-mA I_OH, 64-mA I_OL)
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Package Options Include 100-Pin Plastic
Thin Quad Flat (PZ) Package With
14 × 14-mm Body Using 0.5-mm Lead Pitch
and Space-Saving 100-Pin Ceramic Quad
Flat (HS) Package^†
’ABTH32543 . . . PZ PACKAGE
(TOP VIEW)
1A9
1A10
GND
1A11
1A12
1A13
1A14
GND
1A15
1A16
1A17
1A18
V_CC
2A1
2A2
2A3
2A4
GND
2A5
2A6
2A7
2A8
GND
2A9
2A10
10099 98 9796 959493 92 91 90 89 88 87 86 85 84 83 8281 80 79 78 77 76
1
75
2
74
3
73
4
72
5
71
6
70
7
69
8
68
9
67
10
66
11
65
12
64
13
63
14
62
15
61
16
60
17
59
18
58
19
57
20
56
21
55
22
54
23
53
24
52
25
51
26 272829 3031 32 33 34 35 36 3738 3940 4142 43 44 45 46 474849 50
1B9
1B10
GND
1B11
1B12
1B13
1B14
GND
1B15
1B16
1B17
1B18
V_CC
2B1
2B2
2B3
2B4
GND
2B5
2B6
2B7
2B8
GND
2B9
2B10
† _{The HS package is not production released.}
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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