SN54ABT5400A Datasheet, PDF (1/6 Pages) Texas Instruments – 11-BIT LINE/MEMORY DRIVERS WITH 3-STATE OUTPUTS

SN54ABT5400A, SN74ABT5400A
11-BIT LINE/MEMORY DRIVERS
WITH 3-STATE OUTPUTS
SCBS661B – FEBRUARY 1996 – REVISED MAY 1997
D Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical V_OLP (Output Ground Bounce) < 1 V
at V_CC = 5 V, T_A = 25°C
D Typical V_OLV (Output Undershoot) < 0.5 V at
V_CC = 5 V, T_A = 25°C
D Package Options Include Plastic
Small-Outline (DW) Package and Ceramic
Chip Carriers (FK) and DIPs (JT)
description
These 11-bit buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
SN54ABT5400A . . . JT PACKAGE
SN74ABT5400A . . . DW PACKAGE
(TOP VIEW)
Y1 1
Y2 2
Y3 3
Y4 4
Y5 5
Y6 6
GND 7
GND 8
Y7 9
Y8 10
Y9 11
Y10 12
Y11 13
OE1 14
28 D1
27 D2
26 D3
25 D4
24 D5
23 D6
22 V_CC
21 V_CC
20 D7
19 D8
18 D9
17 D10
16 D11
15 OE2
SN54ABT5400A . . . FK PACKAGE
(TOP VIEW)
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all 11 outputs are in the
high-impedance state.
The outputs, which are designed to source or sink
up to 12 mA, include equivalent 25-Ω series
resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power
up or power down, OE should be tied to V_CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
4 3 2 1 28 27 26
D3 ⁵
25 D9
D2 ⁶
24 D10
D1 ⁷
23 D11
Y1 ⁸
22 OE2
Y2 ⁹
21 OE1
Y3 ¹⁰
20 Y11
Y4 ¹¹
19 Y10
12 13 14 15 16 17 18
The SN54ABT5400A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT5400A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE1 OE2 D
OUTPUT
Y
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright © 1997, Texas Instruments Incorporated
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