SN54ABT245A Datasheet, PDF (1/7 Pages) Texas Instruments – OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SN54ABT245A, SN74ABT245B
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS081H – JANUARY 1991 – REVISED MAY 1997
D State-of-the-Art EPIC-ΙΙB ™ BiCMOS Design
Significantly Reduces Power Dissipation
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical V_OLP (Output Ground Bounce) < 1 V
at V_CC = 5 V, T_A = 25°C
D High-Impedance State During Power Up
and Power Down
D High-Drive Outputs (–32-mA I_OH, 64-mA I_OL)
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Thin Very Small-Outline (DGV) Packages,
Ceramic Chip Carriers (FK), Ceramic Flat
(W) Package, and Plastic (N) and
Ceramic (J) DIPs
description
These octal bus transceivers are designed for
asynchronous communication between data
buses. The devices transmit data from the A bus
to the B bus or from the B bus to the A bus,
depending on the logic level at the
direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so
the buses are effectively isolated.
SN54ABT245A . . . J OR W PACKAGE
SN74ABT245B . . . DB, DGV, DW, N, OR PW PACKAGE
(TOP VIEW)
DIR 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
GND ¹⁰
20 V_CC
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 _B8
SN54ABT245B . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
A3 4
18 B1
A4 5
17 B2
A5 6
16 B3
A6 7
15 _B4
A7 ⁸
14 _B5
9 10 11 12 13
When V_CC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V_CC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT245A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT245B is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE DIR
OPERATION
L
L
B data to A bus
L
H A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
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