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SN54ABT16601 Datasheet, PDF (1/8 Pages) Texas Instruments – 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN54ABT16601, SN74ABT16601
18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS210C – JUNE 1992 – REVISED JANUARY 1997
D Members of the Texas Instruments
Widebus™ Family
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D UBT ™ (Universal Bus Transceiver)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, Clocked, or Clock-Enabled Mode
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 5 V, TA = 25°C
D Flow-Through Architecture Optimizes PCB
Layout
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
These 18-bit universal bus transceivers combine
D-type latches and D-type flip-flops to allow data
flow in transparent, latched, clocked, and
clock-enabled modes.
Data flow in each direction is controlled by
output-enable (OEAB and OEBA), latch-enable
(LEAB and LEBA), and clock (CLKAB and
CLKBA) inputs. The clock can be controlled by the
clock-enable (CLKENAB and CLKENBA) inputs.
For A-to-B data flow, the device operates in the
transparent mode when LEAB is high. When
LEAB is low, the A data is latched if CLKAB is held
at a high or low logic level. If LEAB is low, the
A data is stored in the latch/flip-flop on the
low-to-high transition of CLKAB. Output enable
OEAB is active low. When OEAB is low, the
outputs are active. When OEAB is high, the
outputs are in the high-impedance state.
SN54ABT16601 . . . WD PACKAGE
SN74ABT16601 . . . DGG OR DL PACKAGE
(TOP VIEW)
OEAB 1
LEAB 2
A1 3
GND 4
A2 5
A3 6
VCC 7
A4 8
A5 9
A6 10
GND 11
A7 12
A8 13
A9 14
A10 15
A11 16
A12 17
GND 18
A13 19
A14 20
A15 21
VCC 22
A16 23
A17 24
GND 25
A18 26
OEBA 27
LEBA 28
56 CLKENAB
55 CLKAB
54 B1
53 GND
52 B2
51 B3
50 VCC
49 B4
48 B5
47 B6
46 GND
45 B7
44 B8
43 B9
42 B10
41 B11
40 B12
39 GND
38 B13
37 B14
36 B15
35 VCC
34 B16
33 B17
32 GND
31 B18
30 CLKBA
29 CLKENBA
Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, CLKBA, and CLKENBA.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16601 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT16601 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC-ΙΙB, and UBT are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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