SCES643E Datasheet, PDF (1/27 Pages) Texas Instruments – 1.2 V to 3.6 V on A Port and 1.65 to 5.5 V on B Port (VCCA ≤ VCCB)

TXB0108
www.ti.com
SCES643E – NOVEMBER 2006 – REVISED MAY 2012
8-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR
WITH AUTO-DIRECTION SENSING AND ±15-kV ESD PROTECTION
Check for Samples: TXB0108
FEATURES
1
• 1.2 V to 3.6 V on A Port and 1.65 to 5.5 V on
B Port (V_CCA ≤ V_CCB)
• V_CC Isolation Feature – If Either V_CC Input Is at
GND, All Outputs Are in the High-Impedance
State
• OE Input Circuit Referenced to V_CCA
• Low Power Consumption, 4-μA Max I_CC
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– A Port
– 2000-V Human-Body Model (A114-B)
– 1000-V Charged-Device Model (C101)
– B Port
– ±15-kV Human-Body Model (A114-B)
– ±8-kV Human-Body Model (A114-B)
(YZP Package Only)
– 1000-V Charged-Device Model (C101)
APPLICATIONS
• Handset, Smartphone, Tablet, Desktop PC
GXY OR ZXY PACKAGE
(BOTTOM VIEW)
1 2 3 45
D
C
B
A
TERMINAL ASSIGNMENTS
(20-Ball GXY/ZXY Package)
1
2
3
4
5
D
V_CCB
B2
B4
B6
B8
C
B1
B3
B5
B7
GND
B
A1
A3
A5
A7
OE
A
V_CCA
A2
A4
A6
A8
DQS PACKAGE
(TOP VIEW)
A1 1
A2 2
A3 3
A4 4
V_CCA 5
OE 6
A5 7
A6 8
A7 9
A8 10
20 B1
19 B2
18 B3
17 B4
16 V_CCB
15 GND
14 B5
13 B6
12 B7
11 B8
PW PACKAGE
(TOP VIEW)
A1 1
V_CCA 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 ⁹
OE 10
20 B1
19 V_CCB
18 B2
17 B3
16 B4
15 B5
14 B6
13 B7
12 _B8
11 GND
RGY PACKAGE
(TOP VIEW)
YZP PACKAGE
(BALL SIDE VIEW)
1
V_CCA 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
10
20
19 V_CCB
18 B2
17 B3
16 B4
15 B5
14 B6
13 B7
12 B8
11
E
B6 B8 A8 A6
D GND B7 A7 OE
C
V
B5
CCB
A5 V
CCA
B
B4 B3 A3 A4
A
B2 B1 A1 A2
1 234
Note:
A.
B.
C.
D.
E.
For the RGY package, the exposed center thermal pad must be connected to ground.
Pull up resistors are not required on both sides for Logic I/O.
If pull up or pull down resistors are needed, the resistor value must be over 50 kΩ.
50 kΩ is a safe recommended value, if the customer can accept higher Vol or lower Voh, smaller pull up or pull down
resistor is allowed, the draft estimation is Vol = Vccout × 4.5k/(4.5k + Rpu) and Voh = Vccout × Rdw/(4.5k + Rdw).
If pull up resistors are needed, please refer to the TXS0108 or contact TI.
For detailed information, please refer to application note SCEA043.
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2012, Texas Instruments Incorporated