PTH12050Y Datasheet, PDF (1/7 Pages) Texas Instruments – 6-A Non-Isolated DDR/QDR Memory Bus Termination Modules

PTHxx050Y —Series
6-A Non-Isolated DDR/QDR Memory
Bus Termination Modules
SLTS221 – MARCH 2004
NOMINAL SIZE = 0.87 in x 0.5 in
(22,1 mm x 12,57 mm)
Features
• V_TT Bus Termination Output • Efficiencies up to 88 %
(Output Tracks the System V_REF) _{• 50 W/in³ Power Density}
• 6 A Output Current (8 A Peak) • Output Over-Current Protection
• 3.3-V, 5-V or 12-V Input Voltage (Non-Latching, Auto-Reset)
• DDR & QDR Compatible
• Safety Agency Approvals (Pending):
• On/Off Inhibit (for V_TT Standby) ^{UL/cUL60950, EN60950, VDE}
• Under-Voltage Lockout
• Point-of-Load Alliance (POLA)
• Operating Temp: –40 to +85 °C
Compatible
Description
The PTHxx050Y are a series of ready-
to-use switching regulator modules from
Texas Instruments designed specifically for
bus termination in DDR and QDR memory
applications. Operating from either a 3.3-V,
5-V or 12-V input, the modules generate
a V_TT output that will source or sink up
to 6 A of current (8 A transient) to accu-
rately track their V_REF input. V_TT is the
required bus termination supply voltage,
and V_REF is the reference voltage for the
memory and chipset bus receiver com-
parators. V_REF is usually set to half the
V_DDQ power supply voltage.
Both the PTHxx050Y series employs
an actively switched synchronous rectifier
output to provide state-of-the-art step-
down switching conversion. The products
are small in size (0.87 in × 0.5 in), and are
an ideal choice where space, performance,
and high efficiency are desired, along with
the convenience of a ready-to-use module.
Operating features include an on/off
inhibit and output over-current protection
(source mode only). The on/off inhibit
feature allows the V_TT bus to be turned
off to save power in a standby mode of
operation.
Package options include both through-
hole and surface mount configurations.
Pin Configuration
Pin Function
1 GND
2 V_REF
3 V_IN
4 Inhibit *
5 No Connect
6 V_TT
* Denotes negative logic:
Open = V_TT Output On
Ground = V_TT Output Off
Standard Application
V_IN
V_DDQ
1k
1%
1k
1%
Standby
GND
C_IN
(Required)
Q₁
BSS138
(Optional)
1
6
2
PTHxx050Y
3
(Top View)
4
5
Co₁
Low-ESR
(Required)
Co₂
Ceramic
(Optional)
V_REF
V_TT
Co_n
hf-Ceramic
SSTL-2
Data/
Address
Bus
Cin = Required electrolytic capacitor; 220 µF (3.3-/5-V input), 560 µF (12-V input).
Co₁ = Required low-ESR electrolyitic capacitor; 470 µF (3.3-/5-V input), 940 µF (12-V input).
Co2 = Ceramic capacitance for optimum response to a 3-A (±1.5-A) load transient.; 200 µF (3.3-/5-V input), 400 µF (12-V input).
Con = Distributed hf-ceramic decoupling capacitors for VTT bus; as recommended for DDR memory appications.
For technical support and further information, visit http://power.ti.com