PTH03060Y Datasheet, PDF (1/19 Pages) Texas Instruments – MEMORY BUS TERMINATION MODULES

www.ti.com
PTH03060Y
PTH05060Y, PTH12060Y
SLTS222A – MARCH 2004 – REVISED OCTOBER 2005
10-A NON-ISOLATED DDR/QDR
MEMORY BUS TERMINATION MODULES
FEATURES
• V_TT Bus Termination Output
(Output Tracks the System V_REF)
• 10 A Output Current
• 3.3-V, 5-V or 12-V Input Voltage
• DDR and QDR Compatible
• On/Off Inhibit (for V_TT Standby)
• Undervoltage Lockout
• Operating Temperature: –40°C to 85°C
• Efficiencies up to 91%
• Output Overcurrent Protection (Non-Latching,
Auto-Reset)
• 57 W/in³ Power Density
• Safety Agency Approvals:
UL/cUL60950, EN60950, VDE
• Point-of-Load Alliance (POLA™) Compatible
NOMINAL SIZE
1 in. x 0.62 in
(25,4 mm x 15,75 mm)
DESCRIPTION
The PTHxx060Y are a series of ready-to-use switching regulator modules from Texas Instruments designed
specifically for bus termination in DDR and QDR memory applications. Operating from either a 3.3-V, 5-V or 12-V
input, the modules generate a V_TT output that will source or sink up to 10 A of current to accurately track their
V_REF input. V_TT is the required bus termination supply voltage, and V_REF is the reference voltage for the memory
and chipset bus receiver comparators. V_REF is usually set to half the V_DDQ power supply voltage.
Both the PTHxx060Y series employs an actively switched synchronous rectifier output to provide state-of-the-art
stepdown switching conversion. The products are small in size (1 in × 0.62 in), and are an ideal choice where
space, performance, and high efficiency are desired, along with the convenience of a ready-to-use module.
Operating features include an on/off inhibit and output over-current protection (source mode only). The on/off
inhibit feature allows the V_TT bus to be turned off to save power in a standby mode of operation. To ensure tight
load regulation, an output remote sense is also provided. Package options include both throughhole and surface
mount configurations.
STANDARD APPLICATION
V_IN
V_DDQ
1k
1%
10 9 8
1
7
V_REF
V_TT
1k
1%
PTHxx060Y
(Top View)
2
6
Co_n
hf−Ceramic
Standby
C_IN
(Required)
Q₁
BSS138
(Optional)
345
Co₁
Low−ESR
(Required)
Co₂
Ceramic
(Optional)
SSTL−2
Bus
GND
C_IN = Required Capacitor; 330µF (3.3 ± 5 V Input), 560 µF (12 V Input).
Co₁ = Required Low-ESR Electrolyitic Capacitor; 470 µF (3.3 ± 5 V Input), 940 µF (12 V Input).
Co₂ = Ceramic Capacitance for Optimum Response to a 3 A (+ 1.5 A) Load Transient; 200 µF (3.3 ± 5 V Input), 400 µF (12 V Input).
Co_n = Distributed hf-Ceramic Decoupling Capacitors for V_TT bus; as Recommended for DDR Memory Applications.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
POLA is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2005, Texas Instruments Incorporated