PCA9557 Datasheet, PDF (1/36 Pages) NXP Semiconductors – 8-bit I2C and SMBus I/0 port with reset

PCA9557
www.ti.com.................................................................................................................................................... SCPS133I – DECEMBER 2005 – REVISED JUNE 2008
REMOTE 8-BIT I²C AND SMBus LOW-POWER I/O EXPANDER
WITH RESET AND CONFIGURATION REGISTERS
FEATURES
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• Low Standby Current Consumption of
1 µA Max
• I²C to Parallel Port Expander
• Operating Power-Supply Voltage Range of
2.3 V to 5.5 V
• 5-V Tolerant I/O Ports
• 400-kHz Fast I²C Bus
• Three Hardware Address Pins Allow for Use of
up to Eight Devices on I²C/SMBus
• Lower-Voltage Higher-Performance Migration
Path for PCA9556
• Input/Output Configuration Register
• Polarity Inversion Register
• Active-Low Reset Input
• Internal Power-On Reset
• High-Impedance Open Drain on P0
• Power Up With All Channels Configured as
Inputs
• No Glitch on Power Up
• Noise Filter on SCL/SDA Inputs
• Latched Outputs With High Current Drive
Maximum Capability for Directly Driving LEDs
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D, DB, DGV, OR PW PACKAGE
(TOP VIEW)
RGV PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
SCL 1
SDA 2
A0 3
A1 4
A2 5
P0 6
P1 7
GND 8
16 V_CC
15 _RESET
14 _P7
13 _P6
12 _P5
11 _P4
10 P3
9 P2
16 15 14 13
A0 1
A1 2
A2 3
P0 4
12 P7
11 P6
10 P5
9 P4
5678
SDA 2 ¹
A0 3
A1 4
A2 5
P0 6
P1 7 ₈
16 _{15 RESET}
14 P7
13 P6
12 P5
11 P4
9 ^{10 P3}
DESCRIPTION/ORDERING INFORMATION
This 8-bit I/O expander for the two-line bidirectional bus (I²C) is designed for 2.3-V to 5.5-V V_CC operation. The
device provides general-purpose remote I/O expansion for most microcontroller families via the I²C interface
[serial clock (SCL) and serial data (SDA)].
The PCA9557 consists of one 8-bit configuration (input or output selection), input port, output port, and polarity
inversion (active-high) registers. At power on, the I/Os are configured as inputs. However, the system master can
enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or
output is kept in the corresponding input or output register. The polarity of the input port register can be inverted
with the polarity inversion register. All registers can be read by the system master.
The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low
current consumption.
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2008, Texas Instruments Incorporated