PCA9534A_101 Datasheet, PDF (1/39 Pages) Texas Instruments – REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

PCA9534A
www.ti.com
SCPS141F – SEPTEMBER 2006 – REVISED JUNE 2010
REMOTE 8-BIT I²C AND SMBus LOW-POWER I/O EXPANDER
WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
Check for Samples: PCA9534A
FEATURES
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• Low Standby Current Consumption of
1 mA Max
• I²C to Parallel Port Expander
• Open-Drain Active-Low Interrupt Output
• Operating Power-Supply Voltage Range of
2.3 V to 5.5 V
• 5-V Tolerant I/O Ports
• 400-kHz Fast I²C Bus
• Three Hardware Address Pins Allow Up to
Eight Devices on the I²C/SMBus
• Allows Up to 16 Devices on the I²C/SMBus
When Used in Conjunction with the PCA9534
See Table 1 for I²C Expander offerings
• Input/Output Configuration Register
• Polarity Inversion Register
• Internal Power-On Reset
• Power-Up With All Channels Configured as
Inputs
• No Glitch on Power-Up
• Noise Filter on SCL/SDA Inputs
• Latched Outputs With High-Current Drive
Maximum Capability for Directly Driving LEDs
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
RGV PACKAGE
(TOP VIEW)
RGT PACKAGE
(TOP VIEW)
A0 1
A1 2
A2 3
P0 4
P1 5
P2 6
P3 7
GND 8
16 _VCC
15 _SDA
14 _SCL
13 _INT
12 _P7
11 _P6
10 _P5
9 _P4
16 15 14 13
A2 1
12 SCL
P0 2
11 INT
P1 3
10 P7
P2 4
9 P6
567 8
16 15 14 13
A2 1
12 SCL
P0 2
11 INT
P1 3
10 P7
P2 4
9 P6
567 8
DESCRIPTION/ORDERING INFORMATION
This 8-bit I/O expander for the two-line bidirectional bus (I²C) is designed for 2.3-V to 5.5-V V_CC operation. It
provides general-purpose remote I/O expansion for most microcontroller families via the I²C interface [serial clock
(SCL), serial data (SDA)].
The PCA9534A consists of one 8-bit configuration (input or output selection), input port, output port, and polarity
inversion (active high or active low) register. At power on, the I/Os are configured as inputs. However, the system
master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each
input or output is kept in the corresponding input or output register. The polarity of the input port register can be
inverted with the polarity inversion register. All registers can be read by the system master.
The system master can reset the PCA9534A in the event of a timeout or other improper operation by utilizing the
power-on reset feature, which puts the registers in their default state and initializes the I²C/SMBus state machine.
The PCA9534A open-drain interrupt (INT) output is activated when any input state differs from its corresponding
input port register state and is used to indicate to the system master that an input state has changed.
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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