LMX2492-Q1_15 Datasheet, PDF (1/42 Pages) Texas Instruments – LMX2492/LMX2492-Q1 14 GHz Low Noise Fractional N PLL with Ramp/Chirp Generation

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LMX2492, LMX2492-Q1
SNAS624B – MARCH 2014 – REVISED MAY 2015
LMX2492/LMX2492-Q1 14 GHz Low Noise Fractional N PLL with Ramp/Chirp Generation
1 Features
•1 -227 dBc/Hz Normalized PLL Noise
• 500 MHz - 14 GHz Wideband PLL
• 3.15 - 5.25 V Charge Pump PLL Supply
• Versatile Ramp / Chirp Generation
• 200 MHz Max Phase Detector Frequency
• FSK / PSK Modulation Pin
• Digital Lock Detect
• Single 3.3 V Supply Capability
• Automotive 125°C Q100 Grade 1 Qualification
• Non-Automotive (LMX2492) Option
2 Applications
• Automotive FMCW Radar
• Military Radar
• Microwave Backhaul
• Test and Measurement
• Satellite Communications
• Wireless Infrastructure
• Sampling Clock for High Speed ADC/DAC
3 Description
The LMX2492/92-Q1 is a low noise 14 GHz
wideband delta-sigma fractional N PLL with ramp and
chirp generation. It consists of a phase frequency
detector, programmable charge pump, and high
frequency input for the external VCO. The
LMX2492/92-Q1 supports a broad and flexible class
of ramping capabilities, including FSK, PSK, and
configurable piecewise linear FM modulation profiles
of up to 8 segments. It supports fine PLL resolution
and fast ramp with up to a 200 MHz phase detector
rate. The LMX2492/92-Q1 allows any of its registers
to be read back. The LMX2492/92-Q1 can operate
with a single 3.3 V supply. Moreover, supporting up to
5.25 V charge pump can eliminate the need of
external amplifier, leading to a simpler solution with
improved phase noise performance.
Device Information
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LMX2492-Q1RTW WQFN (24)
4.00 mm x 4.00 mm
LMX2492RTW WQFN (24)
4.00 mm x 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
OSCin
51 :
51 :
GND/OSCin*
GND (x3)
CE
CLK
DATA
LE
2X
MICROWIRE
Interface
TRIG1
TRIG2
MOD
MUXout
MUX
Modulation
Generator
R Divider
(16 bit)
Phase
Comp
N Divider
(18 bit)
6'
Compensation
(24 bit)
Charge
Pump
CPout
C2_LF
Vcp ^C1_LF
Vcc (x5)
R2_LF
Fin
18 :
36 :
Fin*
51 :
68 :
18 :
18 : _{To Circuit}
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.