LM5025D_15 Datasheet, PDF (1/31 Pages) Texas Instruments – Active Clamp Voltage Mode PWM Controller

Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
Reference
Design
LM5025D Active Clamp Voltage Mode PWM Controller
LM5025D
SNVSAB0 – JUNE 2015
1 Features
•1 Internal Start-Up Bias Regulator
• 3-A Compound Main Gate Driver
• Programmable Line Under-Voltage Lockout
(UVLO) with Adjustable Hysteresis
• Voltage Mode Control with Feed-Forward
• Adjustable Dual Mode Over-Current Protection
• Programmable Overlap or Deadtime Between the
Main and Active Clamp Outputs
• Volt x Second Clamp
• Programmable Soft-Start
• Leading Edge Blanking
• Single Resistor Programmable Oscillator
• Oscillator Up and Down Sync Capability
• Precision 5-V Reference
• Thermal Shutdown
2 Applications
• Server Power Supplies
• 48-V Telecom Power Supplies
• 42-V Automotive Applications
• High-Efficiency DC-to-DC Power Supplies
3 Description
The LM5025D is a functional variant of the LM5025
active clamp PWM controller. The functional
differences of the LM5025D are:
• The CS1 and CS2 absolute maximum ratings
have been increased to 7 V.
• The CS1 and CS2 current limit thresholds have
been increased to 0.5 V.
• The internal CS2 filter discharge device has been
disabled and no longer operates each clock cycle.
• The internal V_CC and V_REF regulators continue to
operate when the line UVLO pin is below
threshold.
The LM5025D PWM controller contains all of the
features necessary to implement power converters
utilizing the Active Clamp and Reset technique. With
the active clamp technique, higher efficiencies and
greater power densities can be realized compared to
conventional catch winding or RDC clamp and reset
techniques. Two control outputs are provided, the
main power switch control (OUT_A) and the active
clamp switch control (OUT_B). The two internal
compound gate drivers parallel both MOS and Bipolar
devices, providing superior gate drive characteristics.
This controller is designed for high-speed operation
including an oscillator frequency range up to 1 MHz
and total PWM and current sense propagation delays
less than 100 ns. The LM5025D includes a high-
voltage start-up regulator that operates over a wide
input range of 13 V to 90 V. Additional features
include: Line Under-Voltage Lockout (UVLO),
softstart, oscillator UP and DOWN sync capability,
precision reference and thermal shutdown.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LM5025D
TSSOP (16)
6.60 mm x 5.10 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Diagram
VIN
35 V to 78 V
VOUT
3.3 V
LM5025D
3 CS1
VCC 7
1 VIN
OUT_A 8
16 UVLO OUT_B 9
2 RAMP COMP 13
6 REF
CS2 4
14 RT
SYNC 15
5 TIME
SS 12
PGND AGND
10 11
Error Amp
and
Isolation
Up/ Down
SYNC
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.