JM38510-30001BCA Datasheet, PDF (1/25 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-NAND GATES

D Package Options Include Plastic
Small-Outline (D, NS, PS), Shrink
Small-Outline (DB), and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J) DIPs
SN5400, SN54LS00, SN54S00
SN7400, SN74LS00, SN74S00
QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES
SDLS025B − DECEMBER 1983 − REVISED OCTOBER 2003
D Also Available as Dual 2-Input
Positive-NAND Gate in Small-Outline (PS)
Package
SN5400 . . . J PACKAGE
SN54LS00, SN54S00 . . . J OR W PACKAGE
SN7400, SN74S00 . . . D, N, OR NS PACKAGE
SN74LS00 . . . D, DB, N, OR NS PACKAGE
(TOP VIEW)
SN74LS00, SN74S00 . . . PS PACKAGE
(TOP VIEW)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 V_CC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
1A 1
1B 2
1Y 3
GND 4
8 V_CC
7 2B
6 2A
5 2Y
SN5400 . . . W PACKAGE
(TOP VIEW)
1A 1
1B 2
1Y 3
V_CC 4
2Y 5
2A 6
2B 7
14 4Y
13 4B
12 4A
11 GND
10 3B
9 3A
8 3Y
SN54LS00, SN54S00 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
1Y ₄
18 ^4A
NC 5
17 NC
2A 6
16 4Y
NC 7
15 NC
2B 8
14 3B
9 10 11 12 13
description/ordering information
NC − No internal connection
These devices contain four independent 2-input NAND gates. The devices perform the Boolean function
Y = A • B or Y = A + B in positive logic.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
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