DS26C32ATMX Datasheet, PDF (1/16 Pages) Texas Instruments – DS26C32AT/DS26C32AM Quad Differential Line Receiver

DS26C32AM, DS26C32AT
www.ti.com
SNLS382C – JUNE 1998 – REVISED APRIL 2013
DS26C32AT/DS26C32AM Quad Differential Line Receiver
Check for Samples: DS26C32AM, DS26C32AT
FEATURES
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•2 CMOS Design for Low Power
• ±0.2V Sensitivity over Input Common Mode
Voltage Range
• Typical Propagation Delays: 19 ns
• Typical Input hysteresis: 60 mV
• Inputs Won't Load Line When V_CC = 0V
• Meets the Requirements of EIA Standard RS-
422
• TRI-STATE Outputs for Connection to System
Buses
• Available in Surface Mount
• Mil-Std-883C Compliant
DESCRIPTION
The DS26C32A is a quad differential line receiver
designed to meet the RS-422, RS-423, and Federal
Standards 1020 and 1030 for balanced and
unbalanced digital data transmission, while retaining
the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV
over the common mode input voltage range of ±7V.
The DS26C32A features internal pull-up and pull-
down resistors which prevent output oscillation on
unused channels.
The DS26C32A provides an enable and disable
function common to all four receivers. It also features
TRI-STATE outputs with 6 mA source and sink
capability. This product is pin compatible with the
DS26LS32A and the AM26LS32.
Logic Diagram
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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