DS26C32AMQML Datasheet, PDF (1/16 Pages) Texas Instruments – DS26C32AMQML Quad Differential Line Receiver

DS26C32AMQML
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SNOSAS3A – OCTOBER 2010 – REVISED APRIL 2013
DS26C32AMQML Quad Differential Line Receiver
Check for Samples: DS26C32AMQML
FEATURES
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•2 CMOS Design for Low Power
• ±0.2V Sensitivity Over Input Common Mode
Voltage Range
• Input Fail-Safe Circuitry
• Inputs Won't Load Line When V_CC = 0V
• Meets the Requirements of EIA Standard RS-
422
• TRI-STATE Outputs for Connection to System
Buses
DESCRIPTION
The DS26C32A is a quad differential line receiver
designed to meet the RS-422, RS-423, and Federal
Standards 1020 and 1030 for balanced and
unbalanced digital data transmission, while retaining
the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV
over the common mode input voltage range of ±7V.
The DS26C32A features internal pull-up and pull-
down resistors which prevent output oscillation on
unused channels.
The DS26C32A provides an enable and disable
function common to all four receivers, and features
TRI-STATE outputs with 6 mA source and sink
capability. This product is pin compatible with the
DS26LS32A and the AM26LS32.
CONNECTION DIAGRAMS
Figure 1. CDIP and CLGA Packages-Top View
See Package Numbers NFE0016A, NAC0016A, or NAD0016A
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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