DAC5681Z Datasheet, PDF (1/8 Pages) Texas Instruments – 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER (DAC)

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16-BIT, 1.0 GSPS 2x-4x INTERPOLATING
DIGITAL-TO-ANALOG CONVERTER (DAC)
DAC5681Z
SLLS865 – AUGUST 2007
FEATURES
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• 16-Bit Digital-to-Analog Converter (DAC)
• 1.0 GSPS Update Rate
• 16-Bit, 1.0 GSPS Input LVDS Data Bus
– 8 Sample Input FIFO
– On-Chip Delay Lock Loop
• High Performance
– 73 dBc ACLR WCDMA TM1 at 180 MHz
• 2x-32x Clock Multiplying PLL/VCO
• 2x or 4x Interpolation Filters
– Stopband Transition 0.4–0.6 Fdata
– Filters configurable in either Low-Pass or
High-Pass mode–allows selection or higher
order image
• On-Chip 1.2-V Reference
• Differential Scalable Output: 2 to 20 mA
• Package: 64-Pin 9 × 9 mm QFN
APPLICATIONS
• Cellular Base Stations
• Broadband Wireless Access (BWA)
• WiMAX 802.16
• Fixed Wireless Backhaul
• Cable Modem Termination System (CMTS)
DESCRIPTION
The DAC5681Z is a 16-bit 1.0 GSPS digital-to-analog
converter (DAC) with wideband LVDS data input,
integrated 2x/4x interpolation filters, on-board clock
multiplier, and internal voltage reference. The
DAC5681Z offers superior linearity and noise
performance.
The DAC5681Z integrates a wideband LVDS port
with on-chip termination, providing full 1.0 GSPS data
transfer into the DAC, or half-rate data and 1/4-rate
input data can be interpolated by on-board 2x or 4x
FIR filters. Each interpolation FIR is configurable in
either Low-Pass or High-Pass mode, allowing
selection of a higher order output sectral image. An
on-chip delay lock loop (DLL) simplifies LVDS
interfacing by providing skew control for the LVDS
input data clock.
The current-steering architecture of the DAC5681Z
consists of a segmented array of current sinking
switches directing up to 20mA of full-scale current to
complementary output nodes. An accurate on-chip
voltage reference is temperature-compensated and
delivers a stable 1.2-V reference voltage. Optionally,
an external reference may be used.
The DAC5681Z is characterized for operation over
the industrial temperature range of –40°C to 85°C
and is available in a 64-pin QFN package. The device
is pin upgradeable to the dual-channel DAC5682Z as
well as the single-channel, non-interpolating
DAC5681.
T_A
–40°C to 85°C
ORDER CODE
DAC5681ZIRGCT
DAC5681ZIRGCR
ORDERING INFORMATION
PACKAGE DRAWING/TYPE^{(1) (2)(3)}
TRANSPORT MEDIA
RGC / 64QFN Quad Flatpack No-Lead
Small Tape and Reel
Large Tape and Reel
QUANTITY
250
2000
(1) Thermal Pad Size: 7,4 mm × 7,4 mm
(2) MSL Peak Temperature: Level-3-260C-168 HR
(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2007, Texas Instruments Incorporated