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CY74FCT2374T Datasheet, PDF (1/6 Pages) Texas Instruments – 8-Bit Registers | |||
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Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modiï¬ed to remove devices not offered.
CY74FCT2374T
CY74FCT2574T
SCCS040 - September 1994 - Revised March 2000
Features
⢠Function and pinout compatible with FCT and F logic
⢠25⦠output series resistors to reduce transmission line
reï¬ection noise
⢠FCT-C speed at 5.2 ns max.
⢠Reduced VOH (typically=3.3V) versions of equivalent
FCT functions
⢠Edge-rate control circuitry for signiï¬cantly improved
noise characteristics
⢠Power-off disable feature
⢠Matched rise and fall times
⢠Fully compatible with TTL input and output logic levels
⢠ESD > 2000V
⢠Sink current
Source current
12 mA
15 mA
⢠Edge-triggered D-type inputs
⢠250 MHz typical toggle rate
⢠Extended commercial temp. range of â40ËC to +85ËC
8-Bit Registers
Functional Description
The FCT2374T and FCT2574T are high-speed low-power
octal D-type ï¬ip-ï¬ops featuring separate D-type inputs for each
ï¬ip-ï¬op. On-chip termination resistors have been added to the
outputs to reduce system noise caused by reï¬ections. The
FCT2374T and FCT2574T can be used to replace the
FCT374T and FCT574T to reduce noise in an existing design.
Both devices have three-state outputs for bus oriented appli-
cations. A buffered clock (CP) and output enable (OE) are
common to all ï¬ip-ï¬ops. The FCT2574T is identical to the
FCT2374T except that all the outputs are on one side of the
package and inputs on the other side. The ï¬ip-ï¬ops contained
in the FCT2374T and FCT2574T will store the state of their
individual D inputs that meet the set-up and hold time require-
ments on the LOW-to-HIGH clock (CP) transition. When OE is
LOW, the contents of the ï¬ip-ï¬ops are available at the outputs.
When OE is HIGH, the outputs will be in the high-impedence
state. The state of output enable does not affect the state of
the ï¬ip-ï¬ops.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
D0
D1
D2
D3
D4
D5
D6
D7
CP
CP D CP D CP D CP D CP D CP D CP D CP D
Q
Q
Q
Q
Q
Q
Q
Q
OE
Logic Symbol
D0 D1 D2 D3 D4 D5 D6 D7
CP
OE
O0 O1 O2 O3 O4 O5 O6 O7
FCT2374T-5
O0
O1
O2
O3
O4
O5
O6
O7
FCT2374T-6
Pin Configurations
OE
O0
D0
D1
O1
O2
D2
D3
O3
GND
SOIC/QSOP
Top View
1
20
2
19
3
18
4
17
5 FCT2374T 16
6
15
7
14
8
13
9
12
10
11
VCC
O7
D7
D6
O6
O5
D5
D4
O4
CP
FCT2374T-2
SOIC/QSOP
Top View
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
20 VCC
2
19 O0
3
18 O1
4
17 O2
5 FCT2574 16
O3
6
15
O4
7
14 O5
8
13 O6
9
12 O7
10
11 CP
FCT2374T-4
Copyright © 2000, Texas Instruments Incorporated
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