CY5474FCT827T Datasheet, PDF (1/7 Pages) Texas Instruments – 10-Bit Buffer

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT827T
SCCS034 - September 1994 - Revised March 2000
10-Bit Buffer
Features
• Function, pinout, and drive compatible with FCT, F, and
AM29827 logic
• FCT-C speed at 4.4 ns max. (Com’l)
FCT-A speed at 5.0 ns max. (Com’l)
• Reduced V_OH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• ESD > 2000V
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Sink current
Source current
64 mA (Com’l),
32 mA (Mil)
32 mA (Com’l),
12 mA (Mil)
Functional Description
The FCT827T 10-bit bus driver provides high-performance
bus interface buffering for wide data/address paths or buses
carrying parity. The 10-bit buffers have NAND-ed output
enables for maximum control flexibility. The FCT827T is
designed for high-capacitance load drive capability, while providing
low-capacitance bus loading at both inputs and outputs. All outputs
are designed for low-capacitance bus loading in the
high-impedance state and are designed with a power-off disable
feature to allow for live insertion of boards.
Logic Block Diagram
Pin Configurations
LCC/PLCC
Top View
Y₀
Y₁
Y₂
Y₃
Y₄
Y₅
Y₆
Y₇
Y₈
Y₉
D₀
D₁
D₂
D₃
D₄
D₅
D₆
D₇ D₈
D₉ OE₁ OE₂
1110 9 8 7 6 5
D₈ 12
4 D₁
D₉ 13
3 D₀
GND 14
NC ₁₅
2 OE₁
1 NC
OE_{2 16}
28 VCC
Y_{9 17}
27 Y₀
Y₈
18
26
19 20 21 22 23 24 25
Y₁
SOIC/QSOP
Top View
OE₁ 1
D₀ 2
D₁ 3
D₂ 4
D₃ 5
D₄ 6
D_{5 7}
D_{6 8}
D_{7 9}
D_{8 10}
D_{9 11}
GND ₁₂
24 V_CC
23 Y₀
22 Y₁
21 Y₂
20 Y3
19 Y4
18 Y5
17 Y6
16 Y₇
15 ^Y8
14 Y9
13 OE2
Function Table^[1]
Inputs
OE₁
OE₂
D
L
L
L
L
L
H
H
X
X
X
H
X
Note:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care
Outputs
Y
L
H
Z
Z
Function
Transparent
Three-State
Copyright © 2000, Texas Instruments Incorporated