CSD87502Q2 Datasheet, PDF (1/13 Pages) Texas Instruments – CSD87502Q2 30 V Dual N-Channel NexFET™ Power MOSFETs

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CSD87502Q2
SLPS560 – DECEMBER 2015
CSD87502Q2 30 V Dual N-Channel NexFET™ Power MOSFETs
1 Features
•1 Low On-Resistance
• Dual Independent MOSFETs
• Space Saving SON 2 × 2 mm Plastic Package
• Optimized for 5 V Gate Driver
• Avalanche Rated
• Pb and Halogen Free
• RoHS Compliant
2 Applications
• Point-of-Load Synchronous Buck Converter for
Applications in Networking, Telecom, and
Computing Systems
• Adaptor or USB Input Protection for Notebook
PCs and Tablets
• Battery Protection
Product Summary
T_A = 25°C
V_DS
Drain-to-Source Voltage
Q_g
Gate Charge Total (4.5 V)
Q_gd
Gate Charge Gate to Drain
R_DS(on) Drain-to-Source On Resistance
V_GS(th) Threshold Voltage
TYPICAL VALUE
30
2.2
0.5
V_GS = 3.8 V
V_GS = 4.5 V
V_GS = 10 V
1.6
42.0
35.5
27.0
UNIT
V
nC
nC
mΩ
mΩ
mΩ
V
DEVICE
CSD87502Q2
CSD87502Q2T
.
Ordering Information⁽¹⁾
MEDIA
QTY PACKAGE
7-Inch Reel
7-Inch Reel
3000 _{SON 2 x 2 mm}
250 ^{Plastic Package}
SHIP
Tape and
Reel
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
3 Description
The CSD87502Q2 is a 30 V, 27 mΩ N-Channel
device with dual independent MOSFETs in a SON 2 x
2 mm plastic package. The two FETs were designed
to be used in a half-bridge configuration for
synchronous buck and other power supply
applications. Additionally, these NexFET™ power
MOSFETs can be used for adaptor, USB input
protection, and battery charging applications. The
dual FETs feature low drain-to-source on-resistance
that minimizes losses and offers low component
count for space-constrained applications.
Top View and Circuit Image
Drain
Drain
S1
D1
D1
Absolute Maximum Ratings
T_A = 25°C
V_DS Drain-to-Source Voltage
V_GS Gate-to-Source Voltage
I_D
Continuous Drain Current (Package limited)
I_DM Pulsed Drain Current⁽¹⁾
P_D
Power Dissipation⁽²⁾
T_J, Operating Junction Temperature,
T_stg Storage Temperature
E_AS
Avalanche Energy, single pulse
I_D = 7.9 A, L = 0.1 mH, R_G = 25 Ω
VALUE
30
±20
5.0
23
2.3
–55 to 150
3.1
UNIT
V
V
A
A
W
°C
mJ
(1) Max R_θJA = 185 °C/W, pulse duration ≤100 μs, duty cycle
≤1%.
(2) Typical R_θJA = 55 °C/W on a 1 inch², 2 oz. Cu pad on a 0.06
inch thick FR4 PCB.
G1
G2 Gate
Gate
D2
D2
S2
Source
Source
R_DS(on) vs V_GS
80
TC = 25°C, I D = 4 A
70
TC = 125°C, I D = 4 A
60
50
40
30
20
10
0
0 2 4 6 8 10 12 14 16 18 20
VGS - Gate-to-Source Voltage (V)
D007
1
Gate Charge
10
9
ID = 4 A
VDS = 15 V
8
7
6
5
4
3
2
1
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Qg - Gate Charge (nC)
D004
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.