CDCE906_10 Datasheet, PDF (1/42 Pages) Texas Instruments – PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

CDCE906
www.ti.com
SCAS814H – NOVEMBER 2005 – REVISED DECEMBER 2007
PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
FEATURES
1
•2 High Performance 3:6 PLL based Clock
Synthesizer / Multiplier / Divider
• User Programmable PLL Frequencies
• EEPROM Programming Without the Need to
Apply High Programming Voltage
• Easy In-Circuit Programming via SMBus Data
Interface
• Wide PLL Divider Ratio Allows 0-ppm Output
Clock Error
• Generates Precise Video (27 MHz or 54 MHz)
and Audio System Clocks from Multiple
Sampling Frequencies (f_S = 16, 22.05, 24, 32,
44.1, 48, 96 kHz)
• Clock Inputs Accept a Crystal or a
Single-Ended LVCMOS or a Differential Input
Signal
• Accepts Crystal Frequencies from 8 MHz up to
54 MHz
• Accepts LVCMOS or Differential Input
Frequencies up to 167 MHz
• Two Programmable Control Inputs [S0/S1,
A0/A1] for User Defined Control Signals
• Six LVCMOS Outputs with Output Frequencies
up to 167 MHz
• LVCMOS Outputs can be Programmed for
Complementary Signals
• Free Selectable Output Frequency via
Programmable Output Switching Matrix [6x6]
Including 7-Bit Post-Divider for Each Output
• PLL Loop Filter Components Integrated
• Low Period Jitter (Typ 60 ps)
• Features Spread Spectrum Clocking (SSC) for
Lowering System EMI
• Programmable Center Spread SSC Modulation
(±0.1%, ±0.25%, and ±0.4%) with a Mean Phase
Equal to the Phase of the Non-Modulated
Frequency
• Programmable Down Spread SSC Modulation
(1%, 1.5%, 2%, and 3%)
• Programmable Output Slew-Rate Control
(SRC) for Lowering System EMI
• 3.3-V Device Power Supply
• Commercial Temperature Range 0°C to 70°C
• Development and Programming Kit for Easy
PLL Design and Programming
(TI Pro-Clock™)
• Packaged in 20-Pin TSSOP
TERMINAL ASSIGNMENT
PW PACKAGE
(TOP VIEW)
S0/A0/CLK_SEL
S1/A1
V_CC
GND
CLK_IN0
CLK_IN1
V_CC
GND
SDATA
SCLOCK
1
20
2
19
3
18
4
17
5
TSSOP 20 ₁₆
6
Pitch 0,65 mm
6.6 x 6.6
15
7
14
8
13
9
12
10
11
Y5
Y4
V_CCOUT2
GND
Y3
Y2
V_CCOUT1
GND
Y1
Y0
DESCRIPTION
The CDCE906 is one of the smallest and powerful
PLL synthesizer / multiplier / divider available today.
Despite its small physical outlines, the CDCE906 is
flexible. It has the capability to produce an almost
independent output frequency from a given input
frequency.
The input frequency can be derived from a LVCMOS,
differential input clock, or a single crystal. The
appropriate input waveform can be selected via the
SMBus data interface controller.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Pro-Clock is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2007, Texas Instruments Incorporated