CDCE706 Datasheet, PDF (1/32 Pages) Texas Instruments – PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER

CDCE706
www.ti.com
SCAS815A – OCTOBER 2005 – REVISED OCTOBER 2005
PROGRAMMABLE 3-PLL CLOCK SYNTHESIZER / MULTIPLIER / DIVIDER
FEATURES
• High Performance 2:6 PLL based Clock
Synthesizer / Multiplier / Divider
• User Programmable PLL Frequencies using
EEPROM Technology
• EEPROM Programming Without the Need to
Apply High Programming Voltage
• Easy In-Circuit Programming via SMBus Data
Interface
• Wide PLL Divider Ratio Allows 0-ppm Output
Clock Error
• Clock Inputs Accept a Crystal or a
Single-Ended LVCMOS or a Differential Input
Signal
• Accepts Crystal Frequencies from 8 MHz up
to 54 MHz
• Accepts LVCMOS or Differential Input
Frequencies up to 200 MHz
• Two Programmable Control Inputs [S0/S1,
A0/A1] for User Defined Control Signals
• Six LVCMOS Outputs with Output
Frequencies up to 300 MHz
• LVCMOS Outputs can be Programmed for
Complementary Signals (Pseudo Differential
Outputs)
• Free Selectable Output Frequency via
Programmable Output Switching Matrix [6x6]
Including 7-Bit Post-Divider for Each Output
• PLL Loop Filter Components Integrated
• Low Period Jitter (Typ 60 ps)
• Features Spread Spectrum Clocking (SSC) for
Lowering System EMI
• Programmable Output Slew-Rate Control
(SRC) for Lowering System EMI
• Separate Power Supplies for Outputs (2.3 V to
3.6 V) Supports Mixed Power Supply
Environments
• 3.3-V Device Power Supply
• Industrial Temperature Range –40°C to 85°C
• Development and Programming Kit for Ease
PLL Design and Programming (TI
Pro-Clock™)
• Packaged in 20-Pin TSSOP
TERMINAL ASSIGNMENT
PW PACKAGE
(TOP VIEW)
S0/A0/CLK_SEL
S1/A1
V_CC
GND
CLK_IN0
CLK_IN1
V_CC
GND
SDATA
SCLOCK
1
20
2
19
3
18
4
17
5
TSSOP 20 ₁₆
6
Pitch 0,65 mm
6.6 x 6.6
15
7
14
8
13
9
12
10
11
Y5
Y4
V_CCOUT2
GND
Y3
Y2
V_CCOUT1
GND
Y1
Y0
DESCRIPTION
The CDCE706 is one of the smallest and powerful PLL synthesizer / multiplier / divider available today. Despite
its small physical outlines, the CDCE706 is the most flexible. It has the capability to produce an almost
independent output frequency from a given input frequency.
The input frequency can be derived from a LVCMOS, differential input clock, or a single crystal. The appropriate
input waveform can be selected via the SMBus data interface controller.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Pro-Clock is a trademark of Texas Instruments.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2005, Texas Instruments Incorporated