CD54HCT32 Datasheet, PDF (1/6 Pages) Texas Instruments – High Speed CMOS Logic Quad 2-Input OR Gate

Data sheet acquired from Harris Semiconductor
SCHS274
September 1997
CD54HCT32, CD74HC32,
CD74HCT32
High Speed CMOS Logic
Quad 2-Input OR Gate
[ /Title
(CD54
HCT32
,
CD74
HC32,
CD74
HCT32
)
/Sub-
ject
(High
Features
Description
•
Typical Propagation Delay:
C_L = 15pF, T_A = 25^oC
7ns
at
V_CC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
• Related Literature
- CD54HC32F3A and CD54HCT32F3A Military
Data Sheet, Document Number 3765
The Harris CD74HC32, CD74HCT32 contain four 2-input OR
gates in one package. Logic gates utilize silicon gate CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The 74HCT logic family is functionally pin
compatible with the standard 74LS logic family.
Ordering Information
TEMP. RANGE
PART NUMBER
(^oC)
PACKAGE
PKG.
NO.
CD74HC32E
-55 to 125 14 Ld PDIP
E14.3
CD74HCT32E
-55 to 125 14 Ld PDIP
E14.3
CD74HC32M
-55 to 125 14 Ld SOIC
M14.15
CD74HCT32M
-55 to 125 14 Ld SOIC
M14.15
CD54HCT32F
-55 to 125 14 Ld CERDIP F14.3
CD54HC32W
-55 to 125 Wafer
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die for this part number is available which meets all electrical
specifications. Please contact your local sales office or Harris
customer service for ordering information.
Pinout
CD54HCT32, CD74HC32, CD74HCT32
(PDIP, CERDIP, SOIC)
TOP VIEW
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 V_CC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997
1
File Number 1643.2