CD54HC74 Datasheet, PDF (1/8 Pages) Texas Instruments – Dual D Flip-Flop with Set and Reset Positive-Edge Trigger

Data sheet acquired from Harris Semiconductor
SCHS124
January 1998
CD54HC74, CD74HC74,
CD74HCT74
Dual D Flip-Flop with Set and Reset
Positive-Edge Trigger
[ /Title
(CD54H
C74,
CD74H
C74,
CD74H
CT74)
/Subject
(Dual D
Flip-
Flop
with Set
Features
Description
• Hysteresis on Clock Inputs for Improved Noise Immu-
nity and Increased Input Rise and Fall Times
• Asynchronous Set and Reset
• Complementary Outputs
• Buffered Inputs
• _TTAyp=ic2a5l_ofC_MAX = 50MHz at V_CC = 5V, C_L = 15pF,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
The Harris CD54HC74, CD74HC74 and CD74HCT74 utilize
silicon gate CMOS technology to achieve operating speeds
equivalent to LSTTL parts. They exhibit the low power
consumption of standard CMOS integrated circuits, together
with the ability to drive 10 LSTTL loads.
This flip-flop has independent DATA, SET, RESET and
CLOCK inputs and Q and Q outputs. The logic level present
at the data input is transferred to the output during the
positive-going transition of the clock pulse. SET and RESET
are independent of the clock and are accomplished by a low
level at the appropriate input.
The 74HCT logic family is functionally as well as pin
compatible with the standard 74LS logic family.
Ordering Information
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
TEMP. RANGE
PART NUMBER
(^oC)
PACKAGE
PKG.
NO.
CD54HC74F
-55 to 125 14 Ld CERDIP F14.3
CD74HC74E
-55 to 125 14 Ld PDIP
E14.3
CD74HCT74E
-55 to 125 14 Ld PDIP
E14.3
CD74HC74M
-55 to 125 14 Ld SOIC
M14.15
CD74HCT74M
-55 to 125 14 Ld SOIC
M14.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Die is available which meets all electrical specifications. Please
contact your local sales office or Harris customer service for
ordering information.
Pinout
CD54HC74, CD74HC74, CD74HCT74
(PDIP, SOIC, CERDIP)
TOP VIEW
1R 1
1D 2
1CP 3
1S 4
1Q 5
1Q 6
GND 7
14 V_CC
13 2R
12 2D
11 2CP
10 2S
9 2Q
8 2Q
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1998
1
File Number 1476.1