CD54HC4538 Datasheet, PDF (1/11 Pages) Texas Instruments – High Speed CMOS Logic Dual Retriggerable Precision Monostable Multivibrator

Data sheet acquired from Harris Semiconductor
SCHS123
June 1998
CD54HC4538, CD74HC4538,
CD74HCT4538
High Speed CMOS Logic Dual Retriggerable
Precision Monostable Multivibrator
[ /Title
(CD54
HC453
8,
CD74
HC453
8,
CD74
HCT45
38)
/Sub-
ject
(High
Speed
CMOS
Logic
Features
Description
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Independent of
R_X, C_X
• Triggering from the Leading or Trailing Edge
• Q and Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output-Pulse Widths
• Schmitt Trigger Input on A and B Inputs
• Retrigger Time is Independent of C_X
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
Pinout
CD54HC4538, CD74HC4538, CD74HCT4538
(PDIP, SOIC, CERDIP)
TOP VIEW
1C_X 1
1R_XC_X 2
1R 3
1A 4
1B 5
1Q 6
1Q 7
GND 8
16 V_CC
15 2C_X
14 2R_XC_X
13 2R
12 2A
11 2B
10 2Q
9 2Q
The Harris CD54HC4538, CD74HC4538 and
CD74HCT4538 are dual retriggerable/resettable monostable
precision multivibrators for fixed voltage timing applications.
An external resistor (R_X) and an external capacitor (C_X)
control the timing and the accuracy for the circuit.
Adjustment of R_X and C_X provides a wide range of output
pulse widths from the Q and Q terminals. The propagation
delay from trigger input-to-output transition and the
propagation delay from reset input-to-output transition are
independent of R_X and C_X.
Leading-edge triggering (A) and trailing edge triggering (B)
inputs are provided for triggering from either edge of the
input pulse. An unused “A” input should be tied to GND and
an unused B should be tied to V_CC. On power up the IC is
reset. Unused resets and sections must be terminated. In
normal operation the circuit retriggers on the application of
each new trigger pulse. To operate in the non-triggerable
mode Q is connected to B when leading edge triggering (A)
is used or Q is connected to A when trailing edge triggering
(B) is used. The period (τ) can be calculated from τ = (0.7)
R_X, C_X; R_MIN is 5kΩ. C_MIN is 0pF.
Ordering Information
TEMP. RANGE
PART NUMBER
(^oC)
PACKAGE
PKG.
NO.
CD54HC4538F
-55 to 125 16 Ld CERDIP F16.3
CD74HC4538E
-55 to 125 16 Ld PDIP
E16.3
CD74HCT4538E
-55 to 125 16 Ld PDIP
E16.3
CD74HC4538M
-55 to 125
16 Ld SOIC
M16.15
CD74HCT4538M
-55 to 125
16 Ld SOIC
M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1998
1
File Number 1671.2