CD54HC367_08 Datasheet, PDF (1/17 Pages) Texas Instruments – High-Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting

CD54/74HC367, CD54/74HCT367,
CD54/74HC368, CD74HCT368
Data sheet acquired from Harris Semiconductor
SCHS181D
November 1997 - Revised October 2003
High-Speed CMOS Logic Hex Buffer/Line Driver,
Three-State Non-Inverting and Inverting
[ /Title
(CD74
HC367
,
CD74
HCT36
7,
CD74
HC368
,
CD74
HCT36
8)
/Sub-
ject
(High
Speed
Features
Ordering Information
• Buffered Inputs
• High Current Bus Driver Outputs
• Two Independent Three-State Enable Controls
•
Typical Propagation Delay
C_L = 15pF, T_A = 25^oC
t_PLH,
t_PHL
=
8ns
at
V_CC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55^oC to 125^oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N_IL = 30%, N_IH = 30% of V_CC
at V_CC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V_IL= 0.8V (Max), V_IH = 2V (Min)
- CMOS Input Compatibility, I_l ≤ 1µA at V_OL, V_OH
Description
PART NUMBER
TEMP. RANGE
(^oC)
PACKAGE
CD54HC367F3A
-55 to 125
16 Ld CERDIP
CD54HC368F3A
-55 to 125
16 Ld CERDIP
CD54HCT367F3A
-55 to 125
16 Ld CERDIP
CD74HC367E
-55 to 125
16 Ld PDIP
CD74HC367M
-55 to 125
16 Ld SOIC
CD74HC367MT
-55 to 125
16 Ld SOIC
CD74HC367M96
-55 to 125
16 Ld SOIC
CD74HC368E
-55 to 125
16 Ld PDIP
CD74HC368M
-55 to 125
16 Ld SOIC
CD74HC368MT
-55 to 125
16 Ld SOIC
CD74HC368M96
-55 to 125
16 Ld SOIC
CD74HCT367E
-55 to 125
16 Ld PDIP
CD74HCT367M
-55 to 125
16 Ld SOIC
CD74HCT367MT
-55 to 125
16 Ld SOIC
CD74HCT367M96
-55 to 125
16 Ld SOIC
CD74HCT368E
-55 to 125
16 Ld PDIP
CD74HCT368M
-55 to 125
16 Ld SOIC
CD74HCT368MT
-55 to 125
16 Ld SOIC
CD74HCT368M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
The ’HC367, ’HCT367, ’HC368, and CD74HCT368 silicon gate
CMOS three-state buffers are general purpose high-speed
non-inverting and inverting buffers. They have high drive cur-
rent outputs which enable high speed operation even when
driving large bus capacitances. These circuits possess the low
power dissipation of CMOS circuitry, yet have speeds compara-
ble to low power Schottky TTL circuits. Both circuits are capable
of driving up to 15 low power Schottky inputs.
The ’HC367 and ’HCT367 are non-inverting buffers, whereas
the ’HC368 and CD74HCT368 are inverting buffers. These
devices have two output enables, one enable (OE1) controls 4
gates and the other (OE2) controls the remaining 2 gates.
The ’HCT367 and CD74HCT368 logic families are speed, func-
tion and pin compatible with the standard LS logic family.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
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